Techniques for encoding and decoding using a combinatorial number system

A data storage system comprising:

• a memory circuit comprising memory cells;
• and
• a control circuit operable to receive data bits read from the memory cells, wherein the control circuit is operable to receive redundant bits associated with the data bits,
• wherein the control circuit is operable to identify an encoded number indicated by a first subset of the redundant bits, wherein the control circuit is operable to determine bit positions of a set of stuck-at faults in the memory cells based on combinations that are computed using the encoded number in a combinatorial number system, and wherein the control circuit is operable to adjust digital values of the data bits using the bit positions of the set of stuck-at faults and a second subset of the redundant bits to generate corrected data bits.

A method comprising:

• receiving data bits at a control circuit that are provided for storage in memory cells of a memory circuit, a subset of the memory cells having predetermined stuck-at faults;
• computing a binomial coefficient for each of the predetermined stuck-at faults based on a bit position of a corresponding one of the predetermined stuck-at faults within the memory cells using the control circuit;
• adding together the binomial coefficients computed for the predetermined stuck-at faults using the control circuit to generate an encoded number in a combinatorial number system;
• and
• generating a first set of redundant bits that indicate the encoded number using the control circuit, wherein the first set of redundant bits are used to decode bits read from the memory cells to regenerate the data bits.

A method comprising:

• receiving data bits at a control circuit that are read from memory cells of a memory circuit;
• receiving redundant bits associated with the data bits at the control circuit;
• identifying an encoded number indicated by a first subset of the redundant bits using the control circuit;
• determining bit positions of a set of stuck-at faults in the memory cells using combinations that are computed by the control circuit based on the encoded number in a combinatorial number system;
• and
• adjusting digital values of the data bits using the bit positions of the set of stuck-at faults and a second subset of the redundant bits to generate corrected data bits.