Systems and methods for encoding and decoding of check-irregular non-systematic IRA codes

#The present invention relates to systems and methods for encoding and decoding of messages in any communication system where capacity achieving coding is desired, including all-digital and hybrid digital radio (HD Radio or HDR) communications transmitters and receivers, as well as other wireless or wired communications systems.

#Turbo and Low-Density Parity-Check (LDPC) codes are advanced Forward Error Correction (FEC) schemes. As the information-block size increases, their performance is known to approach the Shannon bound. As such, they are attractive in the design of modern wired and wireless communication systems, such as 3G cellular, Wi-Fi, Wi-MAX, DVB-x (-C2/T2/S2, -SH, -RCS/RCS2, -NGH), ADSL2+, and telemetry (CCSDS), as well as for the reliability of magnetic disks. In practice, LDPC codes can be implemented efficiently allowing for parallel decoding architectures and achieving high data throughputs. They could have better error correcting capabilities than turbo codes, especially for higher coding rates and larger block sizes. As known in the art, Irregular Repeat-Accumulate (IRA) codes are a class of LDPC codes that feature lower encoding complexity than general LDPC codes, with comparable error rate performance.

#It is commonly perceived in the field that these capacity achieving codes (e.g., turbo, LDPC, and IRA) would need to be systematic to enable their convergence at low signal-to-noise ratios. In systematic codes, the information bits are transmitted over the channel together with the coded or parity bits. The ratio of the number of information to the number of parity bits depends on the coding rate (R). In non-systematic codes, information bits are not transmitted but only the coded bits. Until recently, there is a scarcity of work on non-systematic capacity-achieving codes. However, it should be noted that in certain prior art systems, non-systematic IRA codes may perform as well as systematic IRA codes. Importantly, non-systematic capacity-achieving codes may have significant advantages over the systematic ones in some communication scenarios.

#Further features of the invention, its nature and various advantages will be more apparent from the following detailed description of the embodiments, taken in conjunction with the accompanying drawings in which:

#FIG. 1 is a simplified block diagram of a transmitter employing an IRA encoder;

#FIG. 2 is a Tanner graph of Hamming (8,4) code;

#Check-Irregular Non-systematic IRA Encoder and Transmitter

#A typical, simplified transmitter with a check-irregular non-systematic IRA encoder is shown in FIG. 1 in accordance with certain embodiments. The transmitter 5100 includes a set of bit repeaters, also referred to as bit repeater nodes, of different degrees, collectively referred to as irregular bit repeater 5101 that repeats the information bits sequence u on line 5107 in an irregular fashion. For example, a bit repeater of degree m produces m identical replicas of an information bit, as known in the art. These repeated information bits represent the first stage coded bits. An interleaver 5102 performs pseudo-random permutations on the repeated bits sequence v on line 5108, and produces interleaved first stage coded bits v′ on line 5109.

#A set of check node combiners of different degrees, collectively referred to as check nodes 5103 operate on the interleaver output v′ on line 5109 to produce the second stage coded bits, check bits sequence c on line 5110. A check node combiner of degree n performs modulo-2 addition of n inputs bits represented in {0,1} domain, a check node of degree 1 is a by-pass check node, or simply a check by-pass, that simply passes the input bits to the output. The second stage coded bits are processed by an accumulator 5104, which is just a differential encoder, producing the third stage coded bits, coded bits sequence α on line 5111. Then, the third stage coded bits on line 5111 are transformed into modulation symbols using a desired modulation mapping, such as BPSK, QPSK, M-QAM, or other desired modulation mappings, in block 5105 producing modulation symbols x on line 5112 to be transmitted over a channel 5106. For simplicity, an equivalent baseband model is considered here, omitting steps such as carrier modulation, power amplifications and other steps as known in the art. The channel may include additive white Gaussian noise (AWGN), multiplicative fading, or other forms of multipath fading, and possible impulsive and other interference. Finally, the sequence y on line 5113 is the received baseband signal, including the transmitted symbols x distorted by various channel impairments mentioned above. The received signal in one symbol interval, after commonly known processing in the art for the receiver and particularly after demodulator sampling, could be represented as yk=Ak·xk+nk+wk  (1)