Low power timing, configuring, and scheduling
AssigneeDust Networks, Inc.
InventorBrett Warneke
Life of this patent
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Abstract
A device reduces its energy consumption using a relatively lower frequency and lower power secondary oscillator to maintain timing information when a higher frequency and higher power primary oscillator is inactivated. The secondary oscillator maintains timing information at a higher resolution than the period of the oscillator, so as to conserve synchronization when the higher frequency, higher power primary oscillator is inactivated. In some embodiments, a microsequencer is programmably configured to control an integrated radio receiver and transmitter using less power than an associated microprocessor would use to perform the same functions. In other embodiments, flexible event timing facilitates the merging of wake-up events to reduce the energy consumed by wake-up operations in the device.
Claims16
A device for maintaining timing information comprising:
- a first oscillator having a first frequency and an output;
- a first counter having an input coupled to the first oscillator output, the first counter producing a count signal incremented at the first frequency;
- an accumulator having an input coupled to the first oscillator output and outputting an accumulation signal, wherein the accumulator maintains timing information with a resolution higher than that of the accumulation signal;
- a first comparator coupled to the first counter and the accumulator, and configured for outputting a first comparator output signal based on a comparison between the count signal and the accumulation signal;
- and
- a second oscillator having a second frequency higher than the first frequency,
- wherein the comparator output signal is operative to enable a second counter producing a count signal incremented at the second frequency so as to trigger an event with a resolution of the second frequency.
Dependencies are inferred from the claim text.