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US 8,943,330 B2Granted
Apparatus and method for hardware-based secure data processing using buffer memory address range rules
AssigneeQUALCOMM Incorporated
InventorsSudeep Ravi Kottilingal, Jayanth Mandayam, Ron Keidar
Life of this patent
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Abstract
A processor is utilized for processing data from a buffer memory. The processor, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associate with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory.
Claims30
A device comprising:
- a buffer memory;
- and
- a hardware processer coupled to the buffer memory and configured to, in response to a determination that output data to be written is processed based on input data from at least one secure location of the buffer memory associated with a secure address range of the buffer memory:
- allow writing of the output data, processed based on the input data from the at least one secure location, to one or more secure locations of the buffer memory associated with the secure address range, and
- block writing of the output data, processed based on the input data from the at least one secure location, to one or more insecure locations of the buffer memory associated with an insecure address range of the buffer memory;
- wherein the hardware processer is further configured to:
- allow writing of other output data, processed based on input data from at least one insecure location of the buffer memory, to the one or more insecure locations of the buffer memory associated with the insecure address range;
- and
- determine whether the output data to be written is processed based on the input data from the at least one secure location of the buffered memory associated with the secure address range.
6 more elements
An apparatus for processing data from a buffer memory, comprising:
- means for allowing writing of the output data, processed based on input data from at least one secure location of the buffer memory associated with a secure address range of the buffer memory, to one or more secure locations of the buffer memory associated with the secure address range, in response to a determination that the output data to be written is processed based on the input data from the at least one secure location of the buffer memory;
- means for blocking writing of the output data, processed based on the input data from the at least one secure location, to one or more insecure locations of the buffer memory associated with an insecure address range of the buffer memory, in response to a determination that the output data to be written is processed based on input data from the at least one secure location of the buffer memory;
- means for allowing writing of other output data, processed based on input data from at least one insecure location of the buffer memory, to the one or more insecure locations of the buffer memory associated with the insecure address range;
- and
- means for determining whether the output data to be written is processed based on input data from the at least one secure location of the buffer memory associated with the secure address range.
2 more elements
An article, comprising:
- a non-transitory computer-readable medium having instructions stored therein which are executable by a hardware processor of a device to:
- in response to a determination that output data to be written is processed based on input data from at least one secure location of a buffer memory coupled to the hardware-based processor associated with a secure address range of the buffer memory:
- allow writing of the output data, processed based on the input data from the at least one secure location, to one or more secure locations of the buffer memory associated with the secure address range;
- and
- block writing of the output data, processed based on the input data from the at least one secure location, to one or more insecure locations of the buffer memory associated with an insecure address range of the buffer memory:
- and
- wherein the instructions are further executable by the hardware processor of the device to:
- allow writing of other output data, processed based on input data from at least one insecure location of the buffer memory, to the one or more insecure locations of the buffer memory associated with the insecure address range;
- and
- determine whether the output data to be written is processed based on the input data from the at least one secure location of the buffered memory associated with the secure address range.
7 more elements
A method for processing data from a buffer memory, the method comprising, with a hardware processor coupled to the buffer memory:
- determining whether output data to be written is processed based on input data from at least one secure location of a secure address range of the buffer memory;
- in response to a determination that the output data to be written is processed based on the input data from the at least one secure location:
- writing of the output data to one or more secure locations of the secure address range, and
- blocking writing the output data to one or more insecure locations of the buffer memory of an insecure address range of the buffer memory;
- and
- wherein further comprising, with the hardware processor:
- allowing writing of other output data, processed based on input data from at least one insecure location of the buffer memory, to the one or more insecure locations of the buffer memory of the insecure address range;
- and
- determining whether the output data to be written is processed based on the input data from the at least one secure location of the buffered memory associated with the secure address range.
6 more elements
An apparatus, comprising:
- a buffer memory having a plurality of addressable locations comprising:
- secure locations associated with a secure address range, and
- insecure locations associated with an insecure address range;
- and
- a hardware processor coupled to the buffer memory and configured to:
- in response to a determination that output data to be written is processed based on input data from at least one secure location associated with the secure address range of the buffer memory:
- allow writing of the output data, processed based on the input data from the at least one of the secure locations, to one or more of the secure locations of the buffer memory associated with the secure address range, and
- block writing of the output data, processed based on the input data from the at least one of the secure locations, to one or more insecure locations of the buffer memory associated with an insecure address range;
- allow writing of other output data, processed based on input data from at least one insecure location of the buffer memory, to the one or more insecure locations of the buffer memory associated with the insecure address range;
- and
- determine whether the output data to be written is processed based on the input data from the at least one secure location of the buffer memory associated with the secure address range.
8 more elements
Dependencies are inferred from the claim text.