Method and apparatus for generating return address predictions for implicit and explicit subroutine calls using predecode information

A hardware apparatus comprising:

• a first hardware input configured to receive an instruction address;
• a second hardware input configured to receive predecode information, the predecode information describing the instruction address as being associated with an implicit subroutine call to a subroutine and indicating the instruction address as a beginning of the implicit subroutine call;
• and
• a hardware adder configured to add an offset to the instruction address to form an offset instruction address, the offset instruction address defining a return address in response to the predecode information, wherein the predecode information causes the return address to be stored to an explicit subroutine resource.

A method comprising:

• determining that predecode information indicates an implicit subroutine call;
• storing a return address of the implicit subroutine call to a link stack structure during a decode stage of an instruction pipeline, the return address including an offset added to an instruction address;
• and
• reading the return address from the link stack structure to perform a branch prediction during a decode stage of a return call in the instruction pipeline;
• wherein the return call includes a branch instruction to return from a subroutine that is called by the implicit subroutine call.