Configurable cache and method to configure same

An apparatus comprising:

• a cache;
• and
• a processor coupled to the cache, the processor configured to:
• receive an address at a tag state array of the cache, wherein the cache is configurable to have at least two different sizes;
• identify a first portion of the address as a set index;
• locate at least one state field of the tag state array;
• identify a cache line of the cache based on a comparison of a second portion of the address to status bits of the at least one state field, wherein a number of bits of the second portion of the address that are overlapped by the first portion of the address is based on a size of the cache;
• and
• retrieve the cache line.

A non-transitory computer readable medium comprising instructions that, when executed by a processor, cause the processor to:

• receive an address at a tag state array of a cache, wherein the cache is configurable to have at least two different sizes;
• identify a first portion of the address as a set index;
• locate at least one state field of the tag state array,
• identify a cache line of the cache based on a comparison of a second portion of the address to status bits of the at least one state field, wherein a number of bits of the second portion of the address that are overlapped by the first portion of the address is based on a size of the cache;
• and
• retrieve the cache line.

An apparatus comprising:

• storage means, wherein the storage means is configurable to have at least two different sizes:
• and
• means for processing instructions to perform operations operations including;
• receiving an address at a tag state array of the storage means;
• identifying a first portion of the address as a set index;
• locating at least one state field of the tag state array;
• identifying a cache line of the storage means based on a comparison of a second portion of the address to status bits of the at least one state field, wherein a number of bits of the second portion of the address that are overlapped by the first portion of the address is based on a size of the storage means;
• and
• retrieving the cache line.