US 8,943,255 B2 · Methods and structure for accounting for connection resets between peripheral component interconnect express bridges and host devices

Abstract

Methods and structure for accounting are provided for enhancing communications via a PCIE bridge. The bridge comprises a host interface that manages communications with a host device, and a PCIE interface that provides Memory Read Requests (MRds) to a PCIE device and receives Memory Read Completions (MRCs) from the PCIE device. The bridge also comprises a control unit that inserts tag information into the MRds. The control unit detects a reset of the host interface and revises the tag information inserted into the MRds responsive to detecting the reset. Additionally, the control unit analyzes tag information of received MRCs to determine whether it is the revised tag information or is old tag information, returns completion data from MRCs having the revised tag information to the host device, and discards completion data from received MRCs having the old tag information.

Claims21

Dependent claims

A Peripheral Component Interconnect Express (PCIE) bridge, comprising:

a host interface operable to manage communications with a host device;
a PCIE interface operable to provide Memory Read Requests (MRds) to a PCIE device and to receive Memory Read Completions (MRCs) from the PCIE device that correspond to the MRds;
and
a control unit operable to insert tag information into the MRds, wherein multiple outstanding MRds that have not yet been completed via an MRC include the same tag information,
the control unit being further operable to detect a reset of the host interface, to revise the tag information inserted into MRds responsive to detecting the reset of the host interface, to analyze tag information of received MRCs to determine whether it is the revised tag information or is old tag information, to return completion data from MRCs having the revised tag information to the host device, and to discard completion data from received MRCs having the old tag information.

2 more elements

A non-transitory computer readable medium embodying programmed instructions which, when executed by a processor, are operable for performing a method comprising:

operating a host interface of the PCIE bridge to manage communications with a host device;
operating a PCIE interface of the PCIE bridge to provide Memory Read Requests (MRds) to a PCIE device and to receive Memory Read Completions (MRCs) from the PCIE device that correspond to the MRds;
inserting tag information into the MRds, wherein multiple outstanding MRds that have not yet been completed via an MRC include the same tag information;
detecting a reset of the host interface;
revising the tag information inserted into MRds responsive to detecting the reset of the host interface;
analyzing tag information of received MRCs to determine whether it is the revised tag information or is old tag information;
returning completion data from MRCs having the revised tag information to the host device;
and
discarding completion data from received MRCs having the old tag information.

6 more elements

Dependencies are inferred from the claim text.

Methods and structure for accounting for connection resets between peripheral component interconnect express bridges and host devices

Life of this patent

Methods and structure for accounting for connection resets between peripheral component interconnect express bridges and host devices

Life of this patent

Abstract

Claims21