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US 8,943,251 B2Granted
System and method for processing device with differentiated execution mode
AssigneeInfineon Technologies Austria AG
InventorsStephan Schoenfeldt, Sergio Rossi, Fabio Parodi, Juergen Helmschmidt
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Abstract
In accordance with an embodiment of the present invention, a method of operating a system includes operating in a first operating mode to not permit access to an address range, receiving a priority interrupt (PI) signal. The method further includes operating in a second operating mode to permit access to the address range in response to receiving the PI signal.
Claims37
A method of operating a system, the method comprising:
- operating in a first operating mode to not permit write access to an address range;
- receiving a priority interrupt (PI) signal;
- and
- operating in a second operating mode to permit access to the address range in response to receiving the PI signal, wherein one or more of a peripheral component is accessible in the second operating mode and not in the first operating mode.
1 more element
A system comprising:
- a processor;
- a control unit coupled to the processor, the system being configured to:
- operate in a first operating mode to not permit write access to an address range,
- receive a priority interrupt (PI) signal, and
- operate in a second operating mode to permit access to the address range in response to receiving the PI signal;
- and
- one or more peripheral components accessible in the second operating mode and not in the first operating mode.
4 more elements
A device comprising:
- means for operating in a first operating mode to not permit access to a address range;
- means for receiving a priority interrupt (PI) signal;
- and
- means for operating in a second operating mode to permit access to the address range in response to receiving the PI signal, wherein one or more of a peripheral component is accessible in the second operating mode and not in the first operating mode.
1 more element
Dependencies are inferred from the claim text.