Direct memory access and relative addressing
AssigneeXilinx, Inc.
InventorRamesh R. Subramanian
Life of this patent
Estimating the term…
Abstract
A direct memory access circuit includes a buffer handler configured to store received data within a buffer in a buffer memory coupled to the direct memory access circuit and to generate a descriptor for the buffer. The direct memory access circuit further includes a descriptor handler coupled to the buffer handler. The descriptor handler is configured to determine a descriptor address for the descriptor and to store the descriptor at the determined address within a descriptor memory coupled to the direct memory access circuit.
Claims20
A direct memory access circuit, comprising:
- a buffer handler configured to store received data within a buffer in a buffer memory coupled to the direct memory access circuit and to generate a descriptor for the buffer;
- and
- a descriptor handler coupled to the buffer handler;
- wherein the descriptor handler is configured to determine a descriptor address for the descriptor and to store the descriptor at the determined descriptor address within a descriptor memory coupled to the direct memory access circuit.
A method of data processing, comprising:
- storing data from a first application circuit within a buffer in a buffer memory;
- generating, within a direct memory access circuit, a descriptor for the buffer;
- generating, within the direct memory access circuit, an address for the descriptor according to an address of the buffer to which the descriptor corresponds;
- and
- writing the descriptor to a descriptor memory according to the address of each descriptor.
A method of determining addressing for a direct access memory block, the method comprising:
- receiving, using a central processing unit, a user input specifying a size of a buffer memory required for managing a plurality of queues;
- receiving, using the central processing unit, a user input specifying a buffer size for each queue;
- receiving, using the central processing unit, a user input specifying a base descriptor size for individual descriptors of the plurality of queues;
- and
- calculating, using the central processing unit, a size of descriptors stored in the descriptor memory by determining a product of the buffer memory size and the base descriptor size and dividing the product by a smallest buffer size used for the queues.
Dependencies are inferred from the claim text.