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US 8,943,238 B2Granted
Operations using direct memory access
AssigneeAtmel Corporation
InventorsLaurentiu Birsan, Jacques Tellier, Benoit Mouchel
Life of this patent
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Abstract
A system includes a serial interface, a peripheral device coupled to the serial interface, non-volatile memory, and a DMA controller including multiple linked channels. The various channels can be configured in different modes to facilitate the DMA controller performing various operations, such as data transfer, with respect to the non-volatile memory or the peripheral device.
Claims21
A system comprising:
- a central processing unit (CPU);
- a peripheral device;
- non-volatile memory;
- and
- a direct memory access (DMA) controller including DMA channels, wherein a first one of the channels is reserved for data matching, the first channel being operable to determine whether there is a match between information from the peripheral device and information stored by the DMA controller,
- wherein a second one of the channels is linked to the first channel, and wherein the second channel is enabled to transfer data from the peripheral device to the non-volatile memory only if the first channel determines there is a match between the information from the peripheral device and the information stored by the DMA controller.
3 more elements
A system comprising:
- non-volatile memory;
- and
- a direct memory access (DMA) controller including DMA channels, wherein a first one of the channels is operable to read information from the non-volatile memory and to determine whether there is a match between the information from the non-volatile memory and information stored by the DMA controller, wherein if the first channel determines that there is a match between the information from the non-volatile memory and information stored by the DMA controller, the DMA controller enables a second one of the channels to transfer data from the non-volatile memory to a serial interface for delivery to a peripheral device.
A system comprising:
- a serial interface;
- a peripheral device coupled to the serial interface;
- non-volatile memory;
- and
- a direct memory access (DMA) controller including a plurality of linked channels including a first channel configured to operate in a first pattern mode, a second channel configured to operate in a second mode, and a third channel configured to operate in a third mode,
- wherein the first channel is operable to write a wake-up character to the serial interface for transmission to the peripheral device,
- wherein the second channel is operable to determine whether there is a match between information from the peripheral device and information stored by the DMA controller, and if there is such a match, to enable the third channel to transfer data from the peripheral device to the non-volatile memory.
4 more elements
Dependencies are inferred from the claim text.