Chip selection in a symmetric interconnection topology

An integrated circuit device for communicating with a plurality of memory devices, the integrated circuit device comprising:

• a data interface to transfer read data and write data in respective memory access operations via a shared data path coupled in common to each memory device of the plurality of memory devices;
• control logic to (i) receive identification information from each memory device of the plurality of memory devices concurrently via the data interface, (ii) generate one or more device-select values based on the identification information, and (iii) output the device-select values to the plurality of memory devices via the data interface, the one or more device-select values enabling unique identification of a respective memory device of the plurality of memory devices;
• and
• wherein the one or more device-select values comprise a mask value that is output to the plurality of memory devices and which, when combined with an identifying value within a first memory device of the memory devices, produces a chip identification value that is unique with respect to a chip identification value produced by a combination of the mask value and respective identifying values within memory devices of the plurality of memory devices other than the first memory device, wherein the identifying value within each memory device of the plurality of memory devices comprises more bits than the chip identification value produced by the combination of the mask value and the respective identifying value.

A method of operation within an integrated circuit device, the method comprising:

• receiving identification information from each memory device of a plurality of memory devices via a shared data path that is coupled in common to each memory device of the plurality of memory devices;
• outputting one or more device-select values to the plurality of memory devices via the shared data path to enable assignment of a unique identifier within each memory device of the plurality of memory devices;
• outputting a first command to the plurality of memory devices, the first command instructing the plurality of memory devices to output identification information via the data interface, wherein the first command further instructs each of the memory devices to output identification information via the shared data path using a signaling mode in which only a first data state of two possible data states is signaled by each memory device of the plurality of memory devices on respective signaling links of the shared data path, the method further comprising driving the signaling links of the shared data path to a second data state of the two possible data states so that the links of the shared data path on which the first data state is signaled may be distinguished from others of the links of the shared data path;
• outputting write data to a selected memory device of the plurality of memory devices via the shared data path in a memory write operation, wherein the selected memory device is selected using the unique identifier;
• and
• receiving read data from the selected memory device via the shared data path in a memory read operation.

A method of operation within an integrated circuit device, the method comprising:

• receiving identification information from each memory device of a plurality of memory devices via a shared data path that is coupled in common to each memory device of the plurality of memory devices;
• outputting one or more device-select values to the plurality of memory devices via the shared data path to enable assignment of a unique identifier within each memory device of the plurality of memory devices, wherein the one or more device-select values comprise a mask value that is output to each memory device of the plurality of memory devices and which, when combined with an identifying value within each of the memory devices, produces a chip identification value that is unique with respect to the chip identification value produced by combination of the mask value and the identifying value within each other memory device of the plurality of memory devices, wherein the identifying value within each memory device of the plurality of memory devices comprises more bits than the chip identification value produced by the combination of the mask value and identifying value;
• and
• outputting write data to a selected memory device of the plurality of memory devices via the shared data path in a memory write operation, wherein the selected memory device is selected using the unique identifier.