Back to results
US 8,942,038 B2Granted
High endurance nonvolatile memory
AssigneeSanDisk Technologies LLC
InventorsNian Niles Yang, Abhijeet Manohar
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory recycles previously written blocks by reassigning binary logic states and further programming memory cells with modified parameters. Cells are written twice between erase operations, thus reducing wear, and providing higher endurance. Flags indicate whether blocks are recycled, and what parameters to use in programming and reading the blocks.
Claims21
A method of operating a Single Level Cell (SLC) flash memory comprising:
- assigning binary logical states to flash memory cell threshold voltage ranges in a block according to a first assignment scheme;
- programming memory cells of the block according to the first assignment scheme;
- subsequently, in response to determining that data programmed in the memory cells of the block is obsolete, assigning binary logical states to flash memory cell threshold voltage ranges in the block according to a second assignment scheme that is different to the first assignment scheme;
- and
- further programming the memory cells of the block according to the second assignment scheme without erasing the memory cells of the block between the programming and the further programming.
2 more elements
A method of operating a Single Level Cell (SLC) flash memory array, comprising:
- programming a plurality of memory cells to either a first threshold voltage range representing a first binary logic state or a second threshold voltage range representing a second binary logic state according to a first assignment scheme;
- and
- subsequently, in a further programming operation that is performed without an intervening erase operation between the programming and the further programming, further programming individual memory cells of the plurality of memory cells to a third threshold voltage range representing the second binary logic state according to a second assignment scheme.
A non-volatile memory system comprising:
- an array of nonvolatile memory cells configured to store one bit per memory cell;
- and
- programming circuits that are configured to program memory cells, in a first programming operation, to either a first threshold voltage range representing a first binary logic state or a second threshold voltage range representing a second binary logic state according to a first assignment scheme, and subsequently, in a second programming operation performed without an intervening erase operation between the first and second programming operations, to program some of the programmed memory cells to a third threshold voltage range that represents the second binary logic state according to a second assignment scheme, the first and second threshold voltage ranges representing the first binary logic state in the second assignment scheme.
Dependencies are inferred from the claim text.