Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsHiroshi Tsuda, Yoshitaka Kubota, Kenichi Hidaka, Hiromichi Takaoka
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Abstract
A semiconductor device using resistive random access memory (ReRAM) elements and having improved tamper resistance is provided. The semiconductor device is provided with a unit cell which stores one bit of cell data and a control circuit. The unit cell includes n ReRAM elements (n being an integer of 2 or larger). At least one of the ReRAM elements is an effective element where the cell data is recorded. In reading the cell data, the control circuit at least selects the effective element and reads data recorded thereon as the cell data.
Claims14
A semiconductor device provided with a unit cell which stores one bit of cell data and a control circuit;
- wherein the unit cell includes n resistive random access memory (ReRAM) elements (n being an integer of 2 or larger), at least one of the ReRAM elements being an effective element where the cell data is recorded, and
- wherein, in reading the cell data, the control circuit at least selects the effective element and reads data recorded thereon as the cell data.
A semiconductor device provided with a unit cell which stores one bit of cell data, a word line, a bit line and a source line;
- wherein the unit cell includes a first transistor a gate of which is coupled to the word line, one of a source and a drain of which is coupled to the bit line and the other of the source and the drain of which is coupled to a first node and n memory units (n being an integer of two or larger) coupled in parallel between the first node and the source line, and
- wherein the memory units each include a resistive random access memory (ReRAM) element having a first terminal coupled to the first node and a second terminal coupled to a second node and a second transistor a gate of which is coupled to a subword line, one of a source and a drain of which is coupled to the second node and the other of the source and the drain of which is coupled to the source line.
Dependencies are inferred from the claim text.