Method of forming a switched mode power supply controller device with an off mode and structure therefor

#The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.

#Current switch mode power supply controllers seek to maintain an output voltage level within a range (e.g., within Vcc-stop and Vcc-start), and send drive signals to regulate voltage within the range. Such regulation occurs whether an initially applied load changes or not, for example if initially there can be a load voltage on the system, the system will regulate the output voltage to provide the load voltage. However if conditions change so that there can be no longer any load for period of time, typical controller systems are unable to provide an off mode that allows the output voltage to drop outside of the range while there can be little load voltage and to quickly provide regulation again when a load can be redetected. If an off-mode can be provided typically its implementation requires an additional pin to a chip configuration that prohibits a simple plug and play implementation with existing pin connections, thus making such solutions difficult to implement in unmodified systems.

#Accordingly, it can be desirable to have a method of providing an off-mode in a power controller where the semiconductor configuration does not require any additional pins to implement the off-mode.

#Embodiments of present invention will become more fully understood from the detailed description and the accompanying drawings, wherein:

#FIG. 1 schematically illustrates an embodiment of a portion of a system in accordance with an embodiment of the present invention;

#FIG. 2 schematically illustrates an embodiment of a portion of a system in accordance with an embodiment of the present invention;

#For simplicity and clarity of the illustration, elements in the figures are not necessarily to scale, are only schematic and are non-limiting, and the same reference numbers in different figures denote the same elements, unless stated otherwise. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current flow through the device such as a gate of an MOS transistor or a base of a bipolar transistor. It will be appreciated by those skilled in the art that the words “during”, “while”, and “when” as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as a propagation delay, between the reaction that can be initiated by the initial action. Additionally, the term “while” means that a certain action occurs at least within some portion of a duration of the initiating action. The use of the word “approximately” or “substantially” means that a value of an element can have a parameter that can be expected to be close to a stated value or position. However, as can be well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It can be well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described.

#When used in reference to a state of a signal, the term “asserted” means an active state of the signal and inactive means an inactive state of the signal. The actual voltage value or logic state (such as a “1” or a “0”) of the signal depends on whether positive or negative logic can be used. Thus, “asserted” can be either a high voltage or a high logic or a low voltage or low logic depending on whether positive or negative logic can be used and negated may be either a low voltage or low state or a high voltage or high logic depending on whether positive or negative logic can be used. Herein, a positive logic convention can be used, but those skilled in the art understand that a negative logic convention could also be used. The terms “first”, “second”, “third” and the like in the Claims or/and in the Detailed Description of the Drawings, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It can be to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other sequences than described or illustrated herein.

#In addition, the description illustrates a cellular design (where the body regions are a plurality of cellular regions) instead of a single body design (where the body region can be comprised of a single region formed in an elongated pattern, typically in a serpentine pattern). However, it can be intended that the description can be applicable to both a cellular implementation and a single base implementation.