Liquid crystal display device and driving method for changing driving mode thereof
AssigneeLG Display Co., Ltd.
InventorsMinki Kim, Jinsung Kim, Hayoung Ji
Life of this patent
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Abstract
The present invention provides a LCD device including: a timing control unit; an oscillator which is included in the timing control unit and generates a clock frequency; a frequency divider which is included in the timing control unit and reduces the clock frequency supplied from the oscillator by dividing the clock frequency by at least 2; and a mode selection part which is included in the timing control unit and changes at least one driving mode of internal logic circuits by using the divided clock frequency supplied from the frequency divider.
Claims10
A LCD device, comprising:
- a timing control unit;
- an oscillator which is included in the timing control unit and generates a clock frequency;
- a frequency divider which is included in the timing control unit and reduces the clock frequency supplied from the oscillator by dividing the clock frequency by at least 2;
- and
- a mode selection part which is included in the timing control unit and changes at least one driving mode of internal logic circuits by using the divided clock frequency supplied from the frequency divider, wherein the mode selection part changes a driving mode to switch a power control signal outputted from the timing control unit from a normal power state to an ultra low power state when a data signal is a non-signal image;
- wherein the mode selection part generates a divided clock frequency supplied from the frequency divider as a vertical synchronous signal and uses a count value of the vertical synchronous signal as a control signal for changing at least one driving mode of the internal logic circuits;
- and
- wherein the mode selection part does not change at least one driving mode of the internal logic circuits when the count value is “0” and changes at least one driving mode of the internal logic circuits when the count value is “1”.
A method for driving a LCD device includes the steps of:
- controlling a frequency divider to reduce a clock frequency supplied from an oscillator included in a timing control unit by dividing the clock frequency by at least 2;
- and
- changing at least one driving mode of internal logic circuits by using the reduced clock frequency divided by at least 2, determining a data signal as a non-signal image and a normal image, changing at least one driving mode of the internal logic circuits when the data signal is the non-signal image, wherein the step of changing the driving mode is to change the driving mode to switch a power control signal outputted from the timing control unit from a normal power state to an ultra low power state when the data signal is the non-signal image;
- wherein the step of reducing the clock frequency by at least 2 is to generate the clock frequency divided and reduced by at least 2 as a vertical synchronous signal and to change at least one driving mode of the internal circuits by using a count value of the vertical synchronous signal;
- and
- wherein at least one driving mode of the internal logic circuits are not changed when the count value is “0” and at least one driving mode of the internal logic circuits are changed when the count value is “1”.
Dependencies are inferred from the claim text.