Liquid crystal display with dummy stages in shift register and its clock signal operation
AssigneeSharp Kabushiki Kaisha
InventorMasanori Ohara
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AssigneeSharp Kabushiki Kaisha
InventorMasanori Ohara
Estimating the term…
A first gate driver that drives a gate bus line corresponding to a first sub-pixel section and a second gate driver that drives a gate bus line corresponding to a second sub-pixel section are monolithically formed inside a panel. A shift register inside the second gate driver has a configuration where stages corresponding to respective rows and dummy stages each disposed for each row, are connected in series with one another. In such a configuration, a frequency of a clock signal for controlling an operation of the second gate driver is made twice as large as a frequency of a clock signal for controlling an operation of the first gate driver.
A liquid crystal display device, comprising:
Dependencies are inferred from the claim text.
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Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes: for presentation of an…
For presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged…:…
Details of drivers for scan electrodes: suitable for active matrices only
Matrix technologies: integration of the drivers onto the display substrate
About 5 years 3 months of term left · ends 3 Feb 2032 (estimated)
The present application is a National Phase of International Application Number PCT/JP2011/075267, filed Nov. 2, 2011, and claims priority from Japanese Application Number 2010-251578, filed Nov. 10, 2010.
The present invention relates to a liquid crystal display device, and more specifically relates to a liquid crystal display device having a configuration where one pixel is divided into a plurality of sub-pixels in order to improve visual field angle characteristics.
As one of drive systems of a liquid crystal display device, there is conventionally known a system in which “one pixel is configured by a plurality of (typically, two) sub-pixels, and liquid crystal is driven such that the plurality of sub-pixels have different luminance from each other” (hereinafter referred to as a “pixel division system”). This pixel division system is a system to be adopted for improving visual field angle characteristics of the liquid crystal display device. It is to be noted that, hereinafter, a region forming one pixel (each of three-color pixels of R, G and B in the case of a liquid crystal display device where a color display is performed by using the three-color pixels of R, G and B) is referred to as a “pixel section”, and a region forming a sub-pixel is referred to as a “sub-pixel section”.
FIG. 1 is a block diagram showing a configuration of the inside of a liquid crystal panel in an active matrix-type liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a whole configuration of the liquid crystal display device in the above embodiment.
FIG. 3 is a circuit diagram showing a configuration of a pixel section inside the display section in the above embodiment.
Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. It is to be noted that in the following description, a gate terminal (a gate electrode) of a thin-film transistor corresponds to the control terminal, a drain terminal (a drain electrode) thereof corresponds to the first conduction terminal, and a source terminal (a source electrode) thereof corresponds to the second conduction terminal. Further, a description will be given assuming that all the thin-film transistors are of an n-channel type.
<1. Whole Configuration and Operation>
FIG. 2 is a block diagram showing a whole configuration of an active matrix-type liquid crystal display device in an embodiment of the present invention. As shown in FIG. 2, this liquid crystal display device is provided with a liquid crystal panel 100 including a display section 102 and gate drivers (a first gate driver 110L and a second gate driver 110R), a display control circuit 200, a source driver (video signal line drive circuit) 300, and an auxiliary capacitance wiring driver 400. The source driver 300 is mounted on a glass substrate in the form of IC chips. On the other hand, the gate driver, is monolithically formed on the glass substrate inside the liquid crystal panel 100.