Resistor-based Σ-ΔDAC

A digital-to-analog converter, comprising:

• a sigma-delta (EA) modulator to output a ΣΔ-modulated multi-bit output signal, the ΣΔ-modulated multi-bit output signal comprising a plurality of bits;
• a resistor-ladder network comprising a resistor for each bit signal of the ΣΔ-modulated multi-bit output signal, each resistor of the resistor-ladder network comprising an input end and an output end, the input end of each resistor being coupled to a corresponding bit signal of the ΣΔ-modulated multi-bit output signal, and the output end of each resistor being coupled to an output node of the resistor-ladder network, the digital-to-analog converter generating an output voltage at the output node being based on the ΣΔ-modulated multi-bit output signal;
• a plurality of registers, the registers being connected in a sequence with an input to a first register of the plurality of registers to receive the ΣΔ-modulated multi-bit input signal and an output of the first register to output the received ΣΔ-modulated multi-bit signal to an input of a next register of the sequence, a last register of the plurality of registers being not to output the received ΣΔ-modulated multi-bit signal to an input of a next register;
• and
• a plurality of resistor-ladder networks, each resistor-ladder network corresponding to one of the plurality of registers and each resistor-ladder network comprising a resistor for each bit signal of the ΣΔ-modulated multi-bit signal output by the corresponding register, each resistor of a resistor-ladder network comprising an input end and an output end, the input end of each resistor being coupled to the corresponding bit signal of the ΣΔ-modulated multi-bit signal output by the corresponding register, and the output end of each resistor being coupled to an output node of the resistor-ladder network, each output node of the plurality of resistor-ladder networks being coupled to an output node of the digital-to-analog converter, and the digital-to-analog converter to generate an output voltage at the output node of the digital-to-analog converter being based on the ΣΔ-modulated multi-bit input signal.

A digital-to-analog converter, comprising:

• a resistor ladder network comprising two or more resistors, wherein the resistors comprise metal-gate transistors to provide a respective resistance value for one or more of the resistors in the resistor ladder network;
• a slope control circuit coupled to the resistor ladder network;
• and
• a register to receive a multi-bit input and to provide the multi-bit input as an input provided to a respective inverter of the slope control circuit;
• wherein the slope control circuit comprises two or more inverters, and at least one or more of the two or more inverters comprises a digitally-controlled current-starved inverter having a slope control input to control a rise time and a fall time of an input provided to a respective inverter.