Signal processing apparatus and signal processing method thereof
AssigneeKorea Research Institute of Standards and Science
InventorsJin Mok Kim, Hyukchan Kwon, Yong Ho Lee, Ki Woong Kim
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Abstract
Provided are a signal processing apparatus and a signal processing method. The signal processing method include receiving a serial signal including an information frame including channel information and data information of a corresponding channel, extracting a clock signal from the serial signal, generating a load signal when a clock count reaches a maximum clock count by calculating the clock signal; converting the serial signal to a parallel signal according to the load signal, and changing the maximum clock count by comparing parallel-converted parallel channel information with a load count indicating the number of local signals.
Claims15
A signal processing method comprising:
- receiving a serial signal including an information frame including channel information and data information of a corresponding channel;
- extracting a clock signal from the serial signal;
- generating a load signal when a clock count reaches a maximum clock count by calculating the clock signal;
- converting the serial signal to a parallel signal according to the load signal;
- and
- changing the maximum clock count by comparing parallel-converted parallel channel information with a load count indicating the number of local signals.
A signal processing method comprising:
- receiving a serial signal including an information frame including channel information and data information of a corresponding channel;
- and
- extracting a load signal converting the serial signal to a parallel signal from the serial signal and correcting a generation location of the load signal by comparing a load count indicating the number of load signal with parallel-converted parallel channel information.
A signal processing apparatus comprising:
- a clock generator configured to receive a serial signal including an information frame including channel information and data information of a corresponding channel to extract a clock signal from the serial signal;
- a clock counter configured to receive a clock signal of the clock generator to output a load signal when a clock count reaches a maximum clock count;
- a serial-to-parallel converter configured to receive the clock signal, the load signal, and the serial signal to convert the serial signal to a parallel signal according to the load signal;
- and
- a load signal corrector configured to receive the clock signal, the load signal, and parallel channel information of a predetermined location of the parallel signal and to change the maximum clock count.
A signal processing apparatus comprising:
- a clock generator configured to receive a serial signal including an information frame including channel information and data information of a corresponding channel to extract a clock signal from the serial signal;
- a clock counter configured to output a load signal by using the clock signal of the clock generator;
- a serial-to-parallel converter configured to receive the load signal and the serial signal to convert the serial signal to a parallel signal according to the load signal;
- and
- a load signal corrector configured to correct a generation location of the load signal by using the load signal and the parallel signal.
Dependencies are inferred from the claim text.