Semiconductor device package and method

A package comprising:

• a substrate;
• a chip electrically and mechanically attached to a surface of the substrate by electrical connectors;
• an encapsulant encapsulating the chip, a surface of the chip being exposed through the encapsulant, the surface of the chip being distal from the substrate, the encapsulant comprising a first molding compound, the first molding compound comprising a recess in a surface of the first molding compound proximate the surface of the chip;
• a thermal interface material on the surface of the chip and in the recess;
• and
• a lid attached to the thermal interface material.

A method comprising:

• attaching a chip to a surface of a substrate;
• applying a first molding compound on the surface of the substrate and around the chip;
• and
• applying a second molding compound on the first molding compound and around the chip, the first molding compound and the second molding compound having coterminous exterior edges, the exterior edges being located opposite from respective edges of the first molding compound and the second molding compound proximate to the chip, the second molding compound having a different composition than the first molding compound.

A method comprising:

• attaching a chip to a surface of a substrate;
• applying a first molding compound encapsulating the chip;
• forming a recess in a surface of the first molding compound, a surface of the chip being co-planar with the surface of the first molding compound, the recess being proximate the surface of the chip;
• applying a thermal interface material on the surface of the chip and in the recess;
• and
• attaching a lid to the thermal interface material.