Semiconductor device and manufacturing method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsMasayuki Miura, Taku Kamoto, Takao Sato
Life of this patent
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Abstract
In one embodiment, a semiconductor device includes a chip stacked body disposed on an interposer substrate and an interface chip mounted on the chip stacked body. The chip stacked body has plural semiconductor chips, and is electrically connected via through electrodes provided in the semiconductor chips excluding a lowermost semiconductor chip in a stacking order of the plural semiconductor chips and bump electrodes. The interface chip is electrically connected to the interposer substrate via a rewiring layer formed on a surface of an uppermost semiconductor chip in the stacking order or through electrodes provided in the interface chip.
Claims8
A semiconductor device, comprising:
- an interposer substrate having a first surface provided with an external connection terminal and a second surface provided with an internal connection terminal;
- a chip stacked body, disposed on the second surface of the interposer substrate, having plural semiconductor chips sequentially stacked, the plural semiconductor chips being electrically connected via through electrodes provided in the semiconductor chips excluding a lowermost semiconductor chip in a stacking order of the plural semiconductor chips and a first bump electrode connecting between the through electrodes, the lowermost semiconductor chip being electrically connected to the interposer substrate via at least one semiconductor chip having the through electrode, and an uppermost semiconductor chip in the stacking order having a rewiring layer provided on a surface thereof;
- and
- an interface chip mounted on the uppermost semiconductor chip, electrically connected to the uppermost semiconductor chip via a second bump electrode, and electrically connected to the internal connection terminal via the rewiring layer.
Dependencies are inferred from the claim text.