Helical spiral inductor between stacking die
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsiao-Tsung Yen, Cheng-Wei Luo, Chin-Wei Kuo, Min-Chie Jeng
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsiao-Tsung Yen, Cheng-Wei Luo, Chin-Wei Kuo, Min-Chie Jeng
Estimating the term…
The present disclosure relates to a multi-level integrated inductor that provides for a good inductance and Q-factor. In some embodiments, the integrated inductor has a first inductive structure with a first metal layer disposed in a first spiral pattern onto a first IC die and a second inductive structure with a second metal layer disposed in a second spiral pattern onto a second IC die. The first IC die is vertically stacked onto the second IC die. A conductive interconnect structure is located vertically between the first and second IC die and electrically connects the first metal layer to the second metal layer. The conductive interconnect structure provides for a relatively large distance between the first and second inductive structures that provides for an inductance having a high Q-factor over a large range of frequencies.
A multi-level integrated inductor, comprising:
A multi-level integrated inductor, comprising:
A multi-level integrated inductor, comprising:
Dependencies are inferred from the claim text.