Semiconductor device including a diode and method of manufacturing a semiconductor device
AssigneeInfineon Technologies AG
InventorsThorsten Meyer, Andreas Meiser
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AssigneeInfineon Technologies AG
InventorsThorsten Meyer, Andreas Meiser
Estimating the term…
A semiconductor device includes a transistor cell array in the semiconductor body of a first conductivity type. The semiconductor device further includes a first trench in the transistor cell array between transistor cells. The first trench extends into the semiconductor body from a first side and includes a pn junction diode electrically coupled to the semiconductor body at a sidewall.
A semiconductor device, comprising:
A method of manufacturing a semiconductor device, comprising:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
No references of this kind are recorded.
By having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination…
Insulated-gate field-effect transistors [IGFET]: vertical IGFETs
Isolations within a component, i.e. internal isolations: pN junction isolations
Disposition of the gate electrodes, e.g. buried gates: within recesses in the substrate, e.g. trench gates, groove gates or buried gates
About 6 years of term left · ends 23 Oct 2032 (estimated)
One goal of development of new semiconductor technologies lies in further size reduction of semiconductor devices, e.g. transistor cells. When shrinking semiconductor devices, energy capability limitations have to be taken into account. As an example, power devices need to withstand short clamping or short circuit pulses. When shrinking device areas, these devices are required to dissipate an increasing energy density per unit area.
It is desirable to improve the capability of a semiconductor device to absorb pulse energy and to provide a method of manufacturing such a semiconductor device.
According to an embodiment of a semiconductor device, the semiconductor device includes a transistor cell area in a semiconductor body a first conductivity type. The semiconductor device further includes a first trench in the transistor cell area between transistor cells. The trench extends into the semiconductor body from a first side and includes a pn junction diode electrically coupled to the semiconductor body at a sidewall.
The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of the specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain principles of the invention. Other embodiments of the invention and many of the intended advantages will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.
FIG. 1 illustrates a cross-sectional view of one embodiment of a vertical power transistor device including a pn junction diode in a trench.
FIG. 2 illustrates a cross-sectional view of one embodiment of an integrated circuit including a power transistor device with a pn junction diode in a trench.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustrations specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. For example, features illustrated or described for one embodiment can be used on or in conjunction with other embodiments to yield yet a further embodiment. It is intended that the present invention includes such modifications and variations. The examples are described using specific language which should not be construed as limiting the scope of the appending claims. The drawings are not scaled and are for illustrative purposes only. For clarity, corresponding elements have been designated by the same references in the different drawings if not stated otherwise.
The terms “having”, “containing”, “including”, “comprising” and the like are open and the terms indicate the presence of stated structures, elements or features but not preclude additional elements or features. The articles “a”, “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
The Figures illustrate relative doping concentrations by indicating “−” or “+” next to the doping type “n” or “p”. For example, “n−” means a doping concentration which is lower than the doping concentration of an “n”-doping region while an “n+”-doping region has a higher doping concentration than an “n”-doping region. Doping regions of the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different “n”-doping regions may have the same or different absolute doping concentrations.