Low threshold voltage CMOS device

A semiconductor device comprising:

• an NMOS region and a PMOS region;
• the NMOS region having a gate structure comprising a first high-k gate dielectric, a first work function setting metal and a gate electrode fill material and at least one spacer adjacent to the NMOS region gate structure, the first high-k gate dielectric extending underneath the at least one spacer of the NMOS region gate structure;
• the PMOS region having a gate structure comprising a second high-k gate dielectric, a second work function setting metal and a gate electrode fill material and at least one spacer adjacent to the PMOS region gate structure, the second high-k gate dielectric extending underneath the at least one spacer of the PMOS region gate structure;
• wherein the first high-k gate dielectric is different than the second high-k gate dielectric, wherein at least one of the first high-k gate dielectric and the second high-k gate dielectric contains an elemental metal such that (1) the first high-k gate dielectric includes elemental lanthanum, or (2) the second high-k gate dielectric contains elemental aluminum, or (3) the first high-k gate dielectric includes elemental lanthanum and the second high-k gate dielectric contains elemental aluminum, and wherein the first work function setting metal is different than the second work function setting metal;
• wherein the NMOS region gate electrode fill material having a bottom and sides and wherein the first work function setting metal being in direct contact with the bottom and sides of the NMOS region gate electrode fill material;
• and
• wherein the PMOS region gate electrode fill material having a bottom and sides and wherein the second work function setting metal being in direct contact with the bottom and sides of the PMOS region gate electrode fill material.