Buried sublevel metallizations for improved transistor density
AssigneeGlobalfoundries Inc.
InventorsKai Frohberg, Dominik Olligs, Jens Heinrich, Katrin Reiche
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Abstract
Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein electrical interconnects between circuit elements based on a buried sublevel metallization may provide improved transistor density. One illustrative method disclosed herein includes forming a contact dielectric layer above first and second transistor elements of a semiconductor device, and after forming the contact dielectric layer, forming a buried conductive element below an upper surface of the contact dielectric layer, the conductive element providing an electrical connection between the first and second transistor elements.
Claims17
A method, comprising:
- forming a first layer of a contact dielectric layer above a plurality of transistor elements of a semiconductor device, each of said plurality of transistor elements comprising a gate electrode;
- planarizing said first layer to expose an upper surface of said gate electrode of at least two of said plurality of transistor elements;
- forming a sacrificial material layer above said planarized first layer;
- forming a second layer of said contact dielectric layer above said sacrificial material layer;
- and
- after forming said second layer, forming a buried conductive line in said contact dielectric layer below an upper surface of said second layer, said buried conductive line electrically contacting said gate electrodes of said at least two of said plurality of transistor elements.
A method, comprising:
- forming a contact dielectric layer above first and second transistor elements of a semiconductor device;
- forming a substantially horizontally oriented buried cavity in said contact dielectric layer, said buried cavity having first and second open end regions adjacent to first and second gate electrodes of said respective first and second transistor elements and a top surface that is covered by a portion of said contact dielectric layer;
- and
- forming a buried conductive line in said buried cavity, said buried conductive line conductively contacting a first contact surface of said first gate electrode and a second contact surface of said second gate electrode.
Dependencies are inferred from the claim text.