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US 8,940,612 B2Granted
Poly resistor for metal gate integrated circuits
AssigneeTexas Instruments Incorporated
InventorKamel Benaissa
Life of this patent
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Abstract
An integrated circuit containing a metal gate transistor and a thin polysilicon resistor may be formed by forming a first layer of polysilicon and removed it in an area for the thin polysilicon resistor. A second layer of polysilicon is formed over the first layer of polysilicon and in the area for the thin polysilicon resistor. The thin polysilicon resistor is formed in the second layer of polysilicon and the sacrificial gate is formed in the first layer of polysilicon and the second layer of polysilicon. A PMD layer is formed over the second layer of polysilicon and a top portion of the PMD layer is removed so as to expose the sacrificial gate but not expose the second layer of polysilicon in the thin polysilicon resistor. The sacrificial gate is removed and a metal replacement gate is formed.
Claims12
A method of forming an integrated circuit, comprising the steps of:
- providing a substrate;
- forming a first layer of polysilicon over said substrate;
- forming a resistor opening mask over said first layer of polysilicon which exposes an area for a thin polysilicon resistor and covers an area for a metal gate transistor;
- removing said first layer of polysilicon in areas exposed by said resistor opening mask so that said first layer of polysilicon is removed in said area for said thin polysilicon resistor and is left in said area for said metal gate transistor;
- subsequently removing said resistor opening mask;
- forming a second layer of polysilicon over said first layer of polysilicon and over said substrate in said area for said thin polysilicon resistor;
- forming a gate etch mask over said second layer of polysilicon which covers an area for a gate of said metal gate transistor and said area for said thin polysilicon resistor;
- removing said second layer of polysilicon and said first layer of polysilicon in areas exposed by said gate etch mask so that said second layer of polysilicon is left in said area for said thin polysilicon resistor to form a thin resistor body of said thin polysilicon resistor and said second layer of polysilicon and said first layer of polysilicon are left in said area for said metal gate transistor to form a sacrificial gate of said metal gate transistor;
- subsequently removing said gate etch mask;
- forming a pre-metal dielectric (PMD) layer over said substrate, said thin resistor body and said sacrificial gate;
- removing a top portion of said PMD layer so as to expose said sacrificial gate and so as to leave said thin resistor body covered by said PMD layer;
- removing said first layer of polysilicon and said second layer of polysilicon from said sacrificial gate so that said second layer of polysilicon in said thin resistor body is not damaged;
- forming a metal replacement gate in said metal gate transistor, such that said thin polysilicon resistor is thinner said metal replacement gate;
- and
- forming contacts through said PMD layer to said second layer of polysilicon in said thin resistor body.
12 more elements
A method of forming an integrated circuit, comprising the steps of:
- providing a substrate;
- field oxide at a top surface of said substrate;
- forming a first layer of polysilicon over said substrate;
- forming a resistor opening mask over said first layer of polysilicon which exposes an area for a thin polysilicon resistor and covers an area for a metal gate transistor, said area for said thin polysilicon resistor being located over said field oxide;
- removing said first layer of polysilicon in areas exposed by said resistor opening mask so that said first layer of polysilicon is removed in said area for said thin polysilicon resistor and is left in said area for said metal gate transistor;
- subsequently removing said resistor opening mask;
- forming a second layer of polysilicon over said first layer of polysilicon and over said substrate in said area for said thin polysilicon resistor;
- forming a cap layer of dielectric material over said second layer of polysilicon;
- forming an implant mask over said cap layer which exposes said area for said thin polysilicon resistor;
- implanting dopants into said second layer of polysilicon in areas exposed by said implant mask to provide dopants in said area for said thin polysilicon resistor above 1×1018 cm−3;
- subsequently removing said implant mask
- forming a gate etch mask over said second layer of polysilicon which covers an area for a gate of said metal gate transistor and said area for said thin polysilicon resistor;
- removing said second layer of polysilicon and said first layer of polysilicon in areas exposed by said gate etch mask so that said second layer of polysilicon is left in said area for said thin polysilicon resistor to form a thin resistor body of said thin polysilicon resistor and said second layer of polysilicon and said first layer of polysilicon are left in said area for said metal gate transistor to form a sacrificial gate of said metal gate transistor;
- subsequently removing said gate etch mask;
- forming a pre-metal dielectric (PMD) layer over said substrate, said thin resistor body and said sacrificial gate;
- removing a top portion of said PMD layer so as to expose said sacrificial gate and so as to leave said thin resistor body covered by said PMD layer, so that said second layer of polysilicon of said thin polysilicon resistor has thickness of 50 percent to 75 percent of a thickness of said PMD layer adjacent to said thin polysilicon resistor after removing said portion of said PMD layer;
- removing said first layer of polysilicon and said second layer of polysilicon from said sacrificial gate so that said second layer of polysilicon in said thin resistor body is not damaged;
- forming a metal replacement gate in said metal gate transistor;
- and
- forming contacts through said PMD layer to said second layer of polysilicon in said thin resistor body.
17 more elements
Dependencies are inferred from the claim text.