Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels

A method of forming a semiconductor structure comprising:

• forming a trench having vertical sidewalls in a semiconductor substrate, wherein said vertical sidewalls extend downward from a top surface of said semiconductor substrate;
• depositing a stress-generating semiconductor material on said vertical sidewalls and a bottom surface of said trench by a first selective epitaxy process to form a stress-generating semiconductor material portion, wherein each vertical portion of said stress-generating semiconductor material portion has a faceted surface inclined upward toward an edge of a corresponding vertical sidewall and adjoined to a topmost portion of said corresponding vertical sidewall at said edge;
• and
• depositing a doped semiconductor material on said stress-generating semiconductor material portion by an in-situ doped selective epitaxy process to form a doped semiconductor material portion, wherein during a first stage of said in-situ doped selective epitaxy process said doped semiconductor material grows from vertical surfaces and a horizontal surface of said stress-generating semiconductor material portion but not from said faceted surfaces of said stress-generating semiconductor material portion, and during a second stage of said in-situ doped selective epitaxy process said doped semiconductor material grows from said faceted surfaces of said stress-generating semiconductor material portion, and wherein said trench is filled with said stress-generating semiconductor material portion and said doped semiconductor material portion.