US 8,940,566 B2Granted

Semiconductor device, display device, and production method for semiconductor device and display device

AssigneeSharp Kabushiki Kaisha

InventorsOkifumi Nakagawa, Yoshimasa Chikama, Takeshi Hara, Hiromitsu Katsui

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Abstract

The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).

Claims18

Dependent claims

A production method of a display device including a transistor portion having a thin film transistor, a Cs portion having a pixel electrode and a storage capacitor, and a terminal portion having a connecting portion for connecting an upper layer wiring and a lower layer wiring, comprising the steps of:

(A2) forming a gate electrode, a gate insulating layer, and an oxide semiconductor layer of the thin film transistor, the storage capacitor of the Cs portion, and the lower layer wiring of the terminal portion, on a substrate;
(B2) forming a protecting layer by a spin-on-glass technique so as to cover the oxide semiconductor layer, the storage capacitor, and the lower layer wiring;
(C2) forming a source electrode and a drain electrode of the thin film transistor, and the upper layer wiring of the terminal portion, on the protecting layer;
(D2) forming a first and a second contact holes in the protecting layer in the transistor portion, forming a third contact hole in the protecting layer on the storage capacitor, and removing the protecting layer on at least part of the lower layer wiring of the terminal portion;
and
(E2) forming a transparent electrode on the first, second, and third contact holes, and in the terminal portion, wherein
the source electrode and the drain electrode, and the oxide semiconductor layer are electrically connected via the transparent electrode, the transparent electrode and a counter electrode of the storage capacitor are electrically connected in the Cs portion, and the lower layer wiring and the upper layer wiring are electrically connected via the transparent electrode in the terminal portion;
and
the production method further comprising, between steps (C2) and (D2):
a step of forming an interlayer insulating layer so as to cover the source electrode, the drain electrode, and the upper layer wiring;
a step of forming a second protecting layer on the interlayer insulating layer;
and
a step of forming a plurality of contact holes in the second protecting layer;
and
in the step (D2), the interlayer insulating layer and the protecting layer under the plurality of contact holes are removed, thereby forming the first, second and third contact holes.

12 more elements

(A2) forming a gate electrode, a gate insulating layer, and an oxide semiconductor layer of the thin film transistor, the storage capacitor of the Cs portion, and the lower layer wiring of the terminal portion, on a substrate;
(B2) forming a protecting layer by a spin-on-glass technique so as to cover the oxide semiconductor layer, the storage capacitor, and the lower layer wiring;
(C2) forming a source electrode and a drain electrode of the thin film transistor, and the upper layer wiring of the terminal portion, on the protecting layer;
(D2) forming a first and a second contact holes in the protecting layer in the transistor portion, forming a third contact hole in the protecting layer on the storage capacitor, and removing the protecting layer on at least part of the lower layer wiring of the terminal portion;
and
(E2) forming a transparent electrode on the first, second, and third contact holes, and in the terminal portion;
wherein
the source electrode and the drain electrode, and the oxide semiconductor layer are electrically connected via the transparent electrode, the transparent electrode and a counter electrode of the storage capacitor are electrically connected in the Cs portion, and the lower layer wiring and the upper layer wiring are electrically connected via the transparent electrode in the terminal portion;
and
in the step (E2), the transparent electrode is formed so as to be directly in contact with the source electrode and the drain electrode of the thin film transistor, the counter electrode of the storage capacitor, and the lower layer wiring and the upper layer wiring of the terminal portion.

7 more elements

(A2) forming a gate electrode, a gate insulating layer, and an oxide semiconductor layer of the thin film transistor, the storage capacitor of the Cs portion, and the lower layer wiring of the terminal portion, on a substrate;
(B2) forming a protecting layer by a spin-on-glass technique so as to cover the oxide semiconductor layer, the storage capacitor, and the lower layer wiring;
(C2) forming a source electrode and a drain electrode of the thin film transistor, and the upper layer wiring of the terminal portion, on the protecting layer;
(D2) forming a first and a second contact holes in the protecting layer in the transistor portion, forming a third contact hole in the protecting layer on the storage capacitor, and removing the protecting layer on at least part of the lower layer wiring of the terminal portion;
and
(E2) forming a transparent electrode on the first, second, and third contact holes, and in the terminal portion, wherein
the source electrode and the drain electrode, and the oxide semiconductor layer are electrically connected via the transparent electrode, the transparent electrode and a counter electrode of the storage capacitor are electrically connected in the Cs portion, and the lower layer wiring and the upper layer wiring are electrically connected via the transparent electrode in the terminal portion;
and
the step (C2) is performed after the steps (D2) and (E2), thereby forming the source electrode, the drain electrode, and the upper layer wiring of the terminal portion on the transparent electrode.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/883,014Filed 1 Nov 2011
Priority: JP 2010-2471564 Nov 2010
Published: US 2014/0147966 A129 May 2014
Granted: 27 Jan 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H10D 99/00
Subject matter not provided for in other groups of this subclass
G02F 1/136227
Active matrix addressed cells: through-hole connection of the pixel electrode to the active element through an insulation layer
H10D 30/031
Of FETs having insulated gates [IGFET]: of thin-film transistors [TFT]
H10D 30/6704
Thin-film transistors [TFT]: having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling…