Systems and methods for accessing a unified translation lookaside buffer
AssigneeSoft Machines, Inc.
InventorsKarthikeyan Avudaiyappan, Mohammad Abdallah
Life of this patent
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Abstract
Systems and methods for accessing a unified translation lookaside buffer (TLB) are disclosed. A method includes receiving an indicator of a level one translation lookaside buffer (L1TLB) miss corresponding to a request for a virtual address to physical address translation, searching a cache that includes virtual addresses and page sizes that correspond to translation table entries (TTEs) that have been evicted from the L1TLB, where a page size is identified, and searching a second level TLB and identifying a physical address that is contained in the second level TLB. Access is provided to the identified physical address.
Claims20
A method for accessing a unified translation lookaside buffer (TLB), comprising:
- receiving an indicator of a level one translation lookaside buffer (L1TLB) miss corresponding to a request for a virtual address to physical address translation;
- in response to said indicator, searching a cache comprising virtual addresses and page sizes that correspond to translation table entries (TTE's) that have been evicted from said L1TLB, wherein a page size is identified;
- based on said identified page size, searching a second level TLB and identifying a physical address therein;
- and
- providing access to said physical address.
A method for accessing a unified translation lookaside buffer (TLB), comprising:
- receiving a request for a virtual address to physical address translation;
- searching a level one translation lookaside buffer for a translation table entry (TTE) that corresponds to said request;
- receiving an indication of a level one translation lookaside buffer (L1TLB) miss corresponding to said request for said virtual address to physical address translation;
- in response to said indication, searching a cache comprising virtual addresses and page sizes that correspond to TTE's that have been evicted from said L1TLB, wherein a page side is identified;
- based on said identified page size, searching a second level TLB and identifying a TTE entry that includes a physical address therein;
- and
- providing access to said physical address as a response to said request.
A computer system, comprising:
- a memory;
- a processor;
- and
- translation lookaside buffer components comprising:
- a level one translation lookaside buffer;
- a level two translation lookaside buffer;
- a page size cache;
- and
- a system for accessing a unified level two translation lookaside buffer (L2TLB), comprising:
- a receiving component for receiving an indication of a level one translation lookaside buffer (L1TLB) miss corresponding to a request for a virtual address to physical address translation;
- a searching component for, in response to said indication, searching said page size cache comprising virtual addresses and page sizes that correspond to TTEs that have been evicted from an L1TLB, wherein a page side is identified;
- a searching component for, based upon said identified page size, searching a second level TLB and identifying a physical address therein;
- and
- an access providing component for providing access to said physical address.
Dependencies are inferred from the claim text.