Methods, systems, and articles of manufacture for generating multi-layer local maximal orthogonal routing paths in fractured space

A system for implementing multi-layer local maximal spanning routing paths in an electronic design, comprising:

• at least one processor or at least one processor core that is at least to:
• determine a region of interest based at least in part upon one or more requirements and a first feature to be implemented in the region of interest, wherein
• the one or more requirements includes a design constraint that at least one victim circuit feature in the electronic design needs to satisfy;
• determine a local, maximally spanning spacetile for the region of interest;
• and
• implement the first circuit feature by using at least the local, maximally spanning spacetile for adjusting the at least one victim circuit feature while satisfying the one or more requirements for the at least one victim circuit feature.

An article of manufacture comprising a non-transitory computer accessible storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor or at least one processor core executing one or more threads, causes the at least one processor or the at least one processor core to perform a method for implementing multi-layer local maximal spanning routing paths in an electronic design, the method comprising:

• using at least one processor or at least one processor core to perform a process the process comprising:
• determining a region of interest based at least in part upon one or more requirements and a first feature to be implemented in the region of interest, wherein the one or more requirements includes a design constraint that at least one victim circuit feature in the electronic design needs to satisfy;
• determining a local, maximally spanning spacetile for the region of interest;
• and
• implementing the first circuit feature by using at least the local, maximally spanning spacetile for adjusting the at least one victim circuit feature while satisfying the one or more requirements for the at least one victim circuit feature.