Process for fabricating an integrated circuit comprising an analog block and a digital block, and corresponding integrated circuit

A process for fabricating an integrated circuit comprising an analog block and a digital block, the process comprising:

• designing the analog block from a library of components defined in a native technology within a template;
• designing the digital block to overlap the template from a library of components defined in the native technology;
• the analog and digital blocks to be located on a same substrate as said template;
• the designing of the analog and digital blocks comprising
• generating a first initial file representative of the analog block in the native technology,
• constructing, based on the first initial file, a first intermediate file representative in said native technology of at least part of the analog block and a dimensional reduction in contacting areas on electrically active regions and electrically conductive interconnects between metallization levels,
• generating a second initial file representative of the digital block in the native technology, and
• constructing, based on the second initial file, a second intermediate file representative in said shrunken technological version of all of said digital block;
• and
• generating at least one mask file based upon the analog and digital blocks and a combination of the first intermediate file and the second intermediate file.

A process for designing an integrated circuit comprising an analog block and a digital block, the process comprising:

• designing the analog block and the digital block;
• at least portions of the design of the analog block and at least portions of the design of the digital block being taken from a library of components defined in a native technology having an associated shrunken technological version;
• generating a first initial file representative of the analog block in the native technology;
• constructing, based on the first initial file, a first intermediate file representative in said native technology of at least part of the analog block and a dimensional reduction in contacting areas on electrically active regions and electrically conductive interconnects between metallization levels;
• generating a second initial file representative of the digital block in the native technology;
• constructing, based on the second initial file, a second intermediate file representative in said shrunken technological version of all of said digital block;
• and
• generating at least one mask file based upon the analog and digital blocks and a combination of the first intermediate file and the second intermediate file.

A process for designing an integrated circuit comprising an analog block and a digital block, the process comprising:

• designing the analog block from a library of components defined in a native technology within a template;
• designing the digital block to overlap the template from a library of components defined in the native technology;
• designing the analog and digital blocks on a same substrate by
• at least
• generating a first initial file representative of the analog block in the native technology,
• constructing, based on the first initial file, a first intermediate file representative in said native technology of at least part of the analog block and a dimensional reduction in contacting areas on electrically active regions and electrically conductive interconnects between metallization levels,
• generating a second initial file representative of the digital block in the native technology, and
• constructing, based on the second initial file, a second intermediate file representative in said shrunken technological version of all of said digital block;
• and
• generating at least one mask file based upon the analog and digital blocks and a combination of the first intermediate file and the second intermediate file.