Processor testing
AssigneeInternational Business Machines Corporation
InventorsAbhishek Bansal, Nitin P. Gupta, Brad L. Herold, Jayakumar N. Sankarannair
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsAbhishek Bansal, Nitin P. Gupta, Brad L. Herold, Jayakumar N. Sankarannair
Estimating the term…
Processors may be tested according to various implementations. In one general implementation, a process for processor testing may include randomly generating a first plurality of branch instructions for a first portion of an instruction set, each branch instruction in the first portion branching to a respective instruction in a second portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. The process may also include randomly generating a second plurality of branch instructions for the second portion of the instruction set, each branch instruction in the second portion branching to a respective instruction in the first portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. The process may additionally include generating a plurality of instructions to increment a counter when each branch instruction is encountered during execution.
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.