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US 8,914,586 B2Granted
TLB-walk controlled abort policy for hardware transactional memory
AssigneeAdvanced Micro Devices, Inc.
InventorsMartin T. Pohlack, Stephan Diestelhorst
Life of this patent
Estimating the term…
Abstract
A system and method are disclosed for increasing large region transaction throughput by making informed determinations whether to abort a thread from a first core or a thread from a second core when a conflict is detected between the threads. Such a system and method allow resolution of conflicts between a first thread and a second thread. In certain embodiments, the system and method allow a requester to detect a conflict under specific circumstances and make an intelligent decision whether to abort the first thread, enter a wait state to give the first thread an opportunity to complete execution or, if possible, abort the second thread.
Claims16
An apparatus comprising:
- a processor coupleable to a shared memory that is shared by one or more other processors, wherein the processor is configured to execute transactional memory access operation to the shared memory;
- and
- the processor comprising executable code for resolving conflicts between a first thread and a second thread, the executable code comprising instructions for:
- setting a lock indication during execution of a transaction, the transaction acquiring access to a large region of the shared memory, the lock indication indicating to the first thread and the second thread that the first thread has protected the large region of the shared memory;
- determining whether the lock indication is set during execution of the transaction;
- on a condition that the second thread detects the set lock indication when executing another transaction, performing, by the second thread, one operation of a plurality of operations comprising aborting execution of the transaction executing on the first thread by creating a conflict between the first thread and the second thread or aborting execution of the another transaction of the second thread;
- and,
- resetting the lock indication after execution of the transaction is committed.
5 more elements
A multiprocessor computer system comprising:
- a shared memory;
- and
- a plurality of processors coupled to the shared memory, each of the plurality of processors is configured to execute transactional memory access operation to the shared memory and each processor comprises executable code for resolving conflicts between a first thread and a second thread, the executable code comprising instructions for:
- setting a lock indication during execution of a transaction, the transaction acquiring access to a large region of the shared memory, the lock indication indicating to the first thread and the second thread that the first thread has protected the large region of the shared memory;
- determining whether the lock indication is set during execution of the transaction;
- on a condition that the second thread detects the set lock indication when executing another transaction, performing, by the second thread, one operation of a plurality of operations comprising aborting execution of the transaction executing on the first thread by creating a conflict between the first thread and the second thread or aborting execution of the another transaction of the second thread;
- and,
- resetting the lock indication after execution of the transaction is committed.
5 more elements
In a system comprising a memory shared among a plurality of processors, a method comprising:
- setting a lock indication during execution of a transaction, the transaction acquiring access to a large region of memory, the lock indication indicating to the first thread and the second thread that the first thread has protected the large region of memory;
- determining whether the lock indication is set during execution of the transaction;
- on a condition that the second thread detects the set lock indication when executing another transaction, performing, by the second thread, one operation of a plurality of operations comprising aborting execution of the transaction executing on the first thread by creating a conflict between the first thread and the second thread or aborting execution of the another transaction of the second thread;
- and,
- resetting the lock indication after execution of the transaction is committed.
2 more elements
A computer readable medium comprising code stored therein, said code being executable by a processor to fabricate a multiprocessor computer system, said multiprocessor computer system comprising:
- a shared memory;
- and,
- a plurality of processors coupled to the shared memory, each of the plurality of processors is configured to execute transactional memory access operation to the shared memory and each processor comprises executable code for resolving conflicts between a first thread and a second thread, the executable code comprising instructions for:
- setting a lock indication during execution of a transaction, the transaction acquiring access to a large region of the shared memory, the lock indication indicating to the first thread and the second thread that the first thread has protected the large region of the shared memory;
- determining whether the lock indication is set during execution of the transaction;
- on a condition that the second thread detects the set lock indication when executing another transaction, performing, by the second thread, one operation of a plurality of operations comprising aborting execution of the transaction executing on the first thread by creating a conflict between the first thread and the second thread or aborting execution of the another transaction of the second thread;
- and,
- resetting the lock indication after execution of the transaction is committed.
5 more elements
Dependencies are inferred from the claim text.