Security within integrated circuits

#The following references, listed by publication number, are believed to reflect the current state of the art:

#U.S. Pat. No. 6,880,081 to Itkis;

#WO 2007/086046 of NDS Ltd.;

#The present invention will be understood and appreciated more fully from the following detailed description, taken in conjunction with the drawings in which:

#FIG. 1 is a simplified generalized graphical depiction of memory element conditions in a memory element in an integrated circuit over time, the memory element and integrated circuit incorporating a system for hindering detection of secret information leaked from a memory element constructed and operative in accordance with an embodiment of the present invention;

#FIG. 2 is a block diagram illustration of a portion of an exemplary integrated circuit which operates according to the system of FIG. 1;

#Integrated circuits frequently comprise memory units, the memory units comprising physical memory elements and interfaces to the physical memory elements, such as but not limited to ROM (Read Only Memory), RAM (Random Access Memory), and registers, and interfaces to the physical memory elements. The memory units may comprise stored secret information, especially when the memory units are used in secure devices. Such secret information frequently includes, but is not limited to cryptographic keys. The secret information should be neither readable by, nor leakable to an outside observer, hereinafter referred to as an attacker.

#Memory units, such as the memory units described above, are typically accessed by another circuit or another unit in a circuit whether the accessing circuit is in the same integrated circuit as the memory unit or the accessing circuit is outside the memory unit. Those skilled in the art will appreciate that the term “access”, in all of its grammatical forms, such as “accessed” as used in the phrase, “memory units are typically accessed by another circuit” to mean: read data; write data; modify data; erase data; and so forth, as is well known in the art. In order to access such a memory unit, the memory unit should be in an “operational state”, that is, input signals into and output signals from the memory unit are not blocked, and the memory unit has all of the conditions specified by the manufacturer of the memory unit as required for proper operation of the memory unit, thereby allowing access to data stored in the memory unit. For example, and without limiting the generality of the foregoing, voltage is supplied to the memory unit at the voltage level specified by the manufacturer of the memory unit. Additionally, some memory units such as DRAMs (Dynamic Random Access Memory) have to be input clock signals in specified amplitudes, frequencies, or rise times, etc. for operational conditions to be maintained.

#It is appreciated that, as opposed to the operational state, the memory unit may be in a non-operational state. The non-operational state is comprised to two different sub-states: a “retention state”, that is, conditions that will retain the secret information in the memory unit while making data stored in the memory unit inaccessible, either directly or indirectly; and a non-retention state, in which maintenance of the secret information in the memory unit is not guaranteed, and the secret information may be erased from the memory unit.