SRAM with improved write operation
AssigneeFreescale Semiconductor, Inc.
InventorsSayeed A. Badrudduza, Glenn C. Abeln
Life of this patent
Estimating the term…
Abstract
A memory including an array of memory cells, word lines, and voltage supply lines. Each voltage supply line of the plurality of voltage supply lines is coupled to a first voltage supply terminal of a subset of memory cells of subsets of memory cells of the array. Each memory cell of the array is coupled to a word line. The memory includes a row decoder that controls a voltage on each of the word lines and controls a voltage on each of the voltage supply lines. The row decoder provides a low voltage state voltage on one of the voltage supply lines during a write operation to a subset of memory cells coupled to the voltage supply line and the row decoder provides a high voltage state voltage to the voltage supply line during a read operation of the subset of the memory cells.
Claims20
A memory comprising:
- an array of memory cells, wherein each memory cell of the array includes a first supply voltage terminal and a second supply voltage terminal;
- a plurality of word lines, wherein each memory cell of the array is coupled to a word line of the plurality of word lines;
- a plurality of voltage supply lines, each voltage supply line of the plurality of voltage supply lines is coupled to a first voltage supply terminal of a subset of memory cells of a plurality of subsets of memory cells of the array, wherein each subset of the plurality of subsets includes a plurality of memory cells;
- a row decoder, the row decoder controls a voltage on each of the plurality of word lines, the row decoder controls a voltage on each of the plurality of voltage supply lines, wherein during at least one mode of operation, for each voltage supply line of the plurality of voltage supply lines, the row decoder provides a low voltage state voltage on a voltage supply line of the plurality of voltage supply lines during a write operation to a subset of memory cells of the plurality of subsets coupled to the voltage supply line and the row decoder provides a high voltage state voltage to the voltage supply line during a read operation of the subset of the memory cells.
A method for operating a memory comprising:
- performing a write operation to a plurality of memory cells, wherein each cell of the plurality of memory cells is coupled to a word line, each cell of the plurality of memory cells includes a voltage supply terminal coupled to a voltage supply line, wherein during the write operation, a voltage at a high voltage state is provided on the word line and a voltage at a low voltage state is provided on the voltage supply line;
- performing a read operation of the plurality of memory cells, wherein during the read operation, a voltage at a high voltage state is provided on the voltage supply line.
A memory comprising:
- an array of SRAM memory cells, wherein each memory cell of the array includes a first supply voltage terminal and a second supply voltage terminal;
- a plurality of word lines, wherein each memory cell of the array is coupled to a word line of the plurality of word lines;
- a plurality of voltage supply lines, each voltage supply line of the plurality of voltage supply lines is coupled to a first voltage supply terminal of a subset of memory cells of a plurality of subsets of memory cells of the array, wherein each subset of the plurality of subsets includes a plurality of memory cells;
- a row decoder, the row decoder controls a voltage on each of the plurality of word lines, the row decoder controls a voltage on each of the plurality of voltage supply lines, wherein during at least one mode of operation, for each voltage supply line of the plurality of voltage supply lines, the row decoder provides a low voltage state voltage on a voltage supply line of the plurality of voltage supply lines coupled to a subset of the plurality of subsets during a write operation to the memory cells of the subset while providing a high voltage state voltage on a word line of the plurality of word lines that is coupled to the subset.
Dependencies are inferred from the claim text.