US 8,913,453 B2Granted

Semiconductor device and method of operating the same

AssigneeSK hynix Inc.

InventorsKwang Ho Baek, Jin Su Park

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Abstract

A semiconductor device including a memory block, which includes memory cells coupled to bit lines. The semiconductor device further includes a first sensing circuit coupled to an even bit line and configured to sense current flow through the even bit line in response to an even bit line control signal and an even discharge signal. The semiconductor device further includes a second sensing circuit coupled to an odd bit line and configured to sense current flow through the odd bit lines in response to an odd bit line control signal and an odd discharge signal. The first sensing circuit and second sensing circuit are configured to supply a ground voltage to the odd bit line when sensing the current flow through the even bit line, and to supply the ground voltage to the even bit line when sensing the current flow through the odd bit line.

Claims14

Dependent claims

A semiconductor device, comprising:

a memory block, the memory block including memory cells coupled to bit lines;
a first sensing circuit
coupled to an even bit line among the bit lines, and
configured to sense current flow through the even bit line in response to an even bit line control signal and an even discharge signal;
and
a second sensing circuit
coupled to an odd bit line among the bit lines, and
configured to sense the current flow through the odd bit line in response to an odd bit line control signal and an odd discharge signal,
wherein the first sensing circuit and second sensing circuit are configured
to supply a ground voltage to the odd bit line when sensing the current flow through the even bit line, and
to supply the ground voltage to the even bit line when sensing the current flow through the odd bit line,
wherein
the first sensing circuit comprises a first activation control circuit configured to selectively couple the first sensing circuit to the even bit line in response to a first activation control signal, and
the second sensing circuit comprises a second activation control circuit configured to selectively couple the second sensing circuit to the odd bit line in response to a second activation control signal, and
wherein the first activation control signal is the same as the second activation control signal.

12 more elements

Dependencies are inferred from the claim text.