Programming non-volatile storage system with multiple memory die
AssigneeSanDisk Technologies LLC
InventorYan Li
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AssigneeSanDisk Technologies LLC
InventorYan Li
Estimating the term…
A system and methods for programming a set of data onto non-volatile memory elements, maintaining copies of the data pages to be programmed, as well as surrounding data pages, internally or externally to the memory circuit, verifying programming correctness after programming, and upon discovering programming error, recovering the safe copies of the corrupted data to be reprogrammed in alternative non-volatile memory elements. Additionally, a system and methods for programming one or more sets of data across multiple die of a non-volatile memory system, combining data pages across the multiple die by means such as the XOR operation prior to programming the one or more sets of data, employing various methods to determine the correctness of programming, and upon identifying data corruption, recovering safe copies of data pages by means such as XOR operation to reprogram the pages in an alternate location on the non-volatile memory system.
A process for programming non-volatile storage, comprising:
A non-volatile storage system, comprising:
A process for programming non-volatile storage, comprising:
Dependencies are inferred from the claim text.
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Auxiliary circuits, e.g. for writing into memory: programming or data input circuits
Using charge storage in a floating gate: programming or writing circuits; Data input circuits
Arrangements for verifying correct programming or for detecting overprogrammed cells: circuits or methods to verify correct programming of…
Multilevel memory programming aspects: multilevel programming verification
About 6 years 3 months of term left · ends 25 Jan 2033 (estimated)
Semiconductor memory devices have become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Both EEPROM and flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
When programming an EEPROM or flash memory device, typically a program voltage is applied to the control gate and the bit line is grounded. Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised so that the memory cell is in the programmed state. More information about programming can be found in U.S. Pat. No. 6,859,397, titled “Source Side Self Boosting Technique For Non-Volatile Memory;” and in U.S. Pat. No. 6,917,542, titled “Detecting Over Programmed Memory,” both patents are incorporated herein by reference in their entirety.
FIG. 1 is a top view of a NAND string.
FIG. 2 is an equivalent circuit diagram of the NAND string.
FIG. 3 is a block diagram of a non-volatile memory system.
Described herein are a systems and methods by which data can be preserved internally or externally to a memory circuit for verification purposes, such that if a programming operation for that data fails on a certain region of the memory circuit, the data preserved through one or more copies can be programmed elsewhere on the memory circuit. In some embodiments, the failed region of the memory circuit, which can be a page, a block, one or more word lines, or region of some other size, can be marked to prevent future programming attempts. If the programming operation was successful, then all or a portion of the preserved data can be release from the redundant storage.
For example, in the case of detecting possible short circuits between word lines (or other defects), some embodiments of the present technology may preserve the data on pages physically close to the page(s) being programmed. This data may be kept on external data latches, controller RAM, other locations on the NAND memory, or elsewhere. Embodiments of the technology can be used whether pages in the memory are programmed sequentially or randomly.
In embodiments wherein the memory circuit consists of multiple memory die, methods for preserving data pages may include the use of one or more XOR operations (or other logical/mathematical operations) in order to combine or compress the data for more efficient storage. Specifically, corresponding regions of each die may be combined together via one or more XOR operations (or other logical/mathematical operations) either on or off the memory die while part or all of one or more of those regions is being programmed. After the programming operation is complete, in order to verify that the programming operation was successful, the system may read the data page/s that were programmed and/or data surrounding the newly programmed pages. If any of these read operations fail, the system may perform one or more XOR operations (or other logical/mathematical operations) on the stored data with the regions not currently programmed, thus recovering a safe copy of the original data to be programmed. The system may then locate a free region of memory on which to program the saved copy. In embodiments, the saved copy may be erased after a successful programming operation or a successful data recovery.