Scan driving device and driving method thereof

A method for driving a scan driving device including a plurality of scan driving blocks including:

• a first node configured to receive a second power source voltage according to a clock signal that is input to a first clock signal input terminal;
• a second node configured to receive a first power source voltage according to the clock signal that is input to the first clock signal input terminal, and to receive an input signal according to a clock signal that is input to a second clock signal input terminal;
• a first transistor having a gate electrode connected to the first node and configured to transmit the first power source voltage to an output terminal;
• and
• a second transistor having a gate electrode connected to the second node and configured to transmit a clock signal that is input to a third clock signal input terminal to the output terminal, the method comprising:
• resetting the first node of the plurality of scan driving blocks with a gate on voltage, respectively, and resetting the second node of the scan driving blocks with a gate off voltage to reset the scan driving blocks;
• and
• controlling the scan driving blocks to sequentially output scan signals, wherein
• resetting the first and the second nodes of the plurality of scan driving blocks includes, during an initial driving period, maintaining the input signal having a gate off voltage and maintaining the clock signal that is input to the first clock signal input terminal, the clock signal that is input to the second clock signal input terminal, and the clock signal that is input to the third clock signal input terminal having a gate on voltage.

A method for driving a scan driving device including a plurality of scan driving blocks including a first transistor having a gate electrode connected to a first node and configured to transmit a first power source voltage to an output terminal, a second transistor having a gate electrode connected to a second node and configured to transmit a clock signal to the output terminal, an eighth transistor for transmitting a gate off voltage to the first node according to a floating signal, and a seventh transistor for transmitting a gate off voltage to the second node according to the floating signal, the method comprising:

• floating the output terminal by transmitting the gate off voltage to the first node and the second node of the scan driving blocks according to the floating signal;
• resetting the first node of the scan driving blocks with a gate on voltage and resetting the second node of the scan driving blocks with the gate off voltage to reset the scan driving blocks;
• and
• outputting, sequentially, scan signals from the plurality of scan driving blocks.

A scan driving device including a plurality of scan driving blocks that are sequentially arranged, wherein the scan driving blocks respectively include:

• a first node configured to receive a second power source voltage according to a clock signal that is input to a first clock signal input terminal;
• a second node configured to receive a first power source voltage according to the clock signal that is input to the first clock signal input terminal, and to receive an input signal according to a clock signal that is input to a second clock signal input terminal;
• a first transistor including a gate electrode that is connected to the first node, a first electrode that is connected to the first power source voltage, and a second electrode that is connected to an output terminal;
• a second transistor including a gate electrode that is connected to the second node, a first electrode for receiving a clock signal that is input to a third clock signal input terminal, and a second electrode that is connected to the output terminal;
• a seventh transistor including a gate electrode configured to receive a floating signal, a first electrode connected to the first power source voltage, and a second electrode connected to the second node;
• and
• an eighth transistor including a gate electrode connected to an input terminal of the floating signal, a first electrode connected to the first power source voltage, and a second electrode connected to the first node, wherein
• when the seventh transistor and the eighth transistor are turned on by the floating signal, the output terminal is floating.