Semiconductor integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorsShinichi Yasuda, Masato Oda, Shinobu Fujita
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AssigneeKabushiki Kaisha Toshiba
InventorsShinichi Yasuda, Masato Oda, Shinobu Fujita
Estimating the term…
One embodiment provides a semiconductor integrated circuit, including: a first input wire; a second input wire; a first look-up table (LUT) comprising: a plurality of first memories; a first number of first switches connected to the first input wire; and a second number of second switches connected to the second input wire, the second number being less than the first number, the first LUT being configured to output information which is stored in one of the first memories; and a second LUT including: a plurality of second memories; a third number of third switches connected to the second input wire; and a fourth number of fourth switches connected to the first input wire, the fourth number being less than the third number, the second LUT being configured to output information which is stored in one of the second memories.
A semiconductor integrated circuit, comprising:
A semiconductor integrated circuit, comprising:
A semiconductor integrated circuit, comprising:
Dependencies are inferred from the claim text.