US 8,912,809 B2 · Methods and apparatus for performing wafer-level testing on antenna tuning elements

Abstract

A test system for testing an antenna tuning element is provided. The test system may include a tester, a test fixture, and a probing structure. The probing structure may include probe tips configured to mate with corresponding solder bumps formed on a device under test (DUT) containing an antenna tuning element. The DUT may be tested in a shunt or series configuration. The tester may be electrically coupled to the test probe via first and second connectors on the test fixture. An adjustable load circuit that is coupled to the second connector may be configured in a selected state so that a desired amount of electrical stress may be presented to the DUT during testing. The tester may be used to obtain measurement results on the DUT. Systematic effects associated with the test structures may be de-embedded from the measured results to obtain calibrated results.

Claims13

Dependent claims

A method for using a test system to test a device under test, wherein the test system includes a tester and a test structure having at least first and second ports, the method comprising:

coupling the device under test to the first and second ports;
providing a predetermined amount of voltage stress to the device under test by placing an adjustable load circuit that is coupled to the second port in a selected state;
with a test host in the test system, adjusting the adjustable load circuit by sending control signals to the adjustable load circuit via the test structure;
and
while the adjustable load circuit is placed in the selected state, sending radio-frequency test signals to the device under test via the first and second ports with the tester.

2 more elements

A method for operating a test system to test a device under test, wherein the test system includes a tester and a test structure, the method comprising:

mating the device under test with the test structure;
with the tester, sending radio-frequency test signals in a first radio-frequency band to the device under test via the test structure;
while the tester is sending radio-frequency test signals in the first radio-frequency band to the device under test, placing an adjustable load circuit that is coupled to the test structure in a first state so that the device under test is presented with a first predetermined amount of voltage stress that emulates a first stress level that the device under test experiences during normal device operation in the first radio-frequency band;
with the tester, sending radio-frequency test signals in a second radio-frequency band to the device under test via the test structure;
and
while the tester is sending radio-frequency test signals in the second radio-frequency band to the device under test, placing the adjustable load circuit in a second state so that the device under test is presented with a second predetermined amount of voltage stress that emulates a second stress level that the device under test experiences during normal device operation in the second radio-frequency band, wherein the second stress level is different than the first stress level.

3 more elements

Dependencies are inferred from the claim text.

Methods and apparatus for performing wafer-level testing on antenna tuning elements

Life of this patent

Methods and apparatus for performing wafer-level testing on antenna tuning elements

Life of this patent

Abstract

Claims13