Low-power RF peak detector

An apparatus, comprising:

• a first multiplier circuit including first, second, and third field effect transistor (FET) pairs, wherein the first multiplier is configured to receive a first voltage signal at gates of the first FET pair, wherein the first multiplier circuit is configured to receive a second voltage signal at gates of the second and third FET pairs, and wherein a drain of a first transistor in the first transistor pair is coupled to sources of the second transistor pair, wherein a drain of a second transistor in the first transistor pair is coupled to sources of the third transistor pair, and wherein sources of the first and second transistors are coupled to a common node;
• wherein the first multiplier circuit is configured to produce a first pair of currents via two current mirrors coupled to the second and third FET pairs;
• and
• wherein the first multiplier circuit is configured to operate the first, second, and third FET pairs in a linear region of operation.

A method comprising:

• multiplying first and second voltage differential signals received at respective gates of first and second sets of field effect transistors (FETs) of a multiplier circuit, wherein the first and second voltage differential signals cause FETs in the first and second sets of FETs to operate in a linear region of operation;
• comparing a first pair of currents output by the multiplier circuit with a second pair of currents corresponding to a threshold voltage differential signal;
• adjusting a gain of an amplifier based on the comparing;
• and
• wherein the method does not include preamplifying the first and second voltage differential signals prior to the receiving, and wherein the first and second voltage differential signals have a magnitude of less than 25 mV.