Back to results
US 8,912,654 B2Granted
Semiconductor chip with integrated via
AssigneeQimonda AG
InventorsFranz Kreupl, Harry Hedler
Life of this patent
Estimating the term…
Abstract
An integrated circuit with a substrate with a lower and an upper surface is described. A via extends between the upper and the lower surface of the substrate. The via contains a conductive filling material that comprises carbon.
Claims32
An integrated circuit, comprising:
- a substrate with a lower and an upper surface, the substrate comprising at least one via extending between the upper and the lower surface, wherein the via comprises a hole formed by substrate material removal with a diameter between 0.1 μm and 50 μm and a length between 1 μm and 500 μm, wherein the hole of the via comprises a conductive material that comprises 75% to 80% carbon, 15% to 20% of boron and 2% to 8% of nitrogen, wherein the conductive material entirely fills the hole of the via such that the conductive material is substantially free of voids,
- wherein a first metallic contact pad disposed above the upper surface of the substrate is coupled to a first end of the via and a second metallic contact pad disposed below the lower surface of the substrate is coupled to a second end of the via.
An integrated circuit comprising:
- a substrate with a lower surface and an upper surface, the substrate comprising at least one via extending between the upper and the lower surfaces, wherein the via comprises a frame of a substrate material and at least two pillars of the substrate material, the frame enclosing the at least two pillars, wherein the at least two pillars are surrounded, along a plane parallel to the lower and upper surfaces, by a conductive material of the via that comprises 75% to 80% carbon, 15% to 20% of boron and 2% to 8% of nitrogen, wherein the conductive material entirely fills the via such that the conductive material is substantially free of voids, and wherein the via has a diameter less than or equal to 50 μm.
A method for producing an integrated circuit with a via, the method comprising:
- providing a semiconductor substrate with an upper and a lower surface;
- partially removing substrate material to form at least one hole extending from an upper surface into the substrate and toward the lower surface, wherein the hole has a diameter less than or equal to 50 μm and a length less than or equal to 500 μm;
- depositing a conductive filling material comprising 75% to 80% carbon, 15% to 20% of boron and 2% to 8% of nitrogen into a center of the hole;
- and
- after depositing the conductive filling material, partially removing substrate material from the lower surface of the substrate thereby exposing the conductive filling material at the lower surface of the integrated circuit.
2 more elements
Dependencies are inferred from the claim text.