Method for manufacturing semiconductor device and semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorToru Matsuda
Life of this patent
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Abstract
According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method includes forming a second stacked body on the planarized interlayer insulating film and on the uppermost stair. The second stacked body includes a second conductive film thicker than the first conductive film and a second insulating film stacked on the second conductive film. The method includes dividing the second stacked body into a select gate on the uppermost stair and a plurality of wall portions in a staircase region below the uppermost stair. The method includes forming a plurality of vias piercing the interlayer insulating film under a region between the wall portions and reaching the first conductive film of each of the stairs.
Claims9
A semiconductor device comprising:
- a first stacked body including a first insulating film and a first conductive film alternately stacked in a plurality and including a plurality of stairs processed in a staircase configuration;
- an interlayer insulating film provided on the stairs so as to fill a level difference between the stairs;
- a second stacked body provided on the interlayer insulating film and on an uppermost stair and including a second conductive film and a second insulating film provided on the second conductive film, the second conductive film being thicker than the first conductive film and including a select gate on the uppermost stair and a plurality of wall portions in a staircase region below the uppermost stair;
- and
- a plurality of vias extending in a stacking direction of the first insulating film and the first conductive film in the interlayer insulating film under a region between the wall portions and being connected to the first conductive film of each of the stairs.
Dependencies are inferred from the claim text.