Distributed heating transistor devices providing reduced self-heating
AssigneeThe United States of America as represented by the Secretary of the Army
InventorsAli Darwish, Hingloi Alfred Hung
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Abstract
According to various embodiments, a distributed heating transistor includes: a plurality of active regions where transistor action occurs including a heat source; and at least one inactive region where transistor action does not occur and no heat source is present, wherein adjacent active regions are separated by the at least one inactive region. The distributed heating transistor may be configured as field effect transistors (FETs), and bipolar junction transistors (BJTs). Methods for forming the distributed heating transistors are also provided.
Claims20
A distributed heating transistor comprising:
- a plurality of discrete channels;
- and
- an element configured to control transistor action comprising:
- first regions positioned proximate to respective channels which control transistor action through the channels;
- and
- at least one second region positioned between adjacent first regions which does not control transistor action,
- wherein the thickness of the element at the at least one second region is greater than the thickness of the first regions so as to minimize the series resistance of the first regions and the at least one second region.
A method of fabricating a distributed heating transistor, the method comprising:
- forming a plurality of discrete channels;
- and
- an element configured to control transistor action comprising:
- first regions positioned proximate to respective channels which control transistor action through the channels;
- and
- at least one second region positioned between adjacent first regions which does not control transistor action,
- wherein the thickness of the element at the at least one second region is greater than the thickness of the first regions so as to minimize the series resistance of the first regions and the at least one second region.
A distributed heating field effect transistor (FET) comprising:
- a plurality of discrete channels between a source and a drain;
- and
- an gate configured to control transistor action comprising:
- first regions positioned proximate to respective channels having a length parallel to the channel length which control transistor action through the channels;
- and first regions having a length parallel to the channel length which does
- at least one second region positioned between adjacent not control transistor action,
- wherein, the length of the at least one second region is longer than the length of the first regions, the thickness of the at least one second region is greater than the thickness of the first regions, or both, so as to minimize the series resistance of the first regions and the at least one second region.
Dependencies are inferred from the claim text.