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US 8,912,574 B2Granted
Device isolation with improved thermal conductivity
AssigneeInternational Business Machines Corporation
InventorsMattias E. Dahlstrom, Dinh Dang, Qizhi Liu, Ramana M. Malladi
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Abstract
A method of making a semiconductor structure includes forming a trench through a shallow trench isolation (STI) structure and into a substrate, and forming a liner including an electrical insulator material on sidewalls of the trench. The method also includes forming a core including a high thermal conductivity material in the trench and on the liner, and forming a cap in the trench and on the core.
Claims14
A method of making a semiconductor structure, comprising:
- forming a shallow trench isolation (STI) structure in a substrate;
- forming a barrier layer on and contacting the STI structure and the substrate, wherein the barrier layer is composed of nitride or oxynitride;
- forming an insulator layer on and contacting the barrier layer;
- forming a trench through the STI structure and into the substrate;
- forming a liner comprising an electrical insulator material on sidewalls and a bottom of the of the trench;
- forming a core comprising a high thermal conductivity material in the trench and on the liner, wherein the liner is between the core and the substrate across the bottom of the trench;
- and
- forming a cap in the trench and on the core,
- wherein the forming the trench comprises forming the trench adjacent to a heterojunction bipolar transistor (HBT) comprising a collector, a base formed over the collector, and an emitter formed over the base;
- and
- an uppermost surface of the core is above an interface region between the collector and the base.
8 more elements
A semiconductor structure, comprising:
- a transistor structure;
- a plurality of shallow trench isolation structures adjacent to the transistor structure on multiple sides of the transistor structure;
- and
- a plurality of trench isolation structures formed through the plurality of shallow trench isolation structures,
- wherein each one of the plurality of trench isolation structures comprises:
- a trench formed through an insulator layer, one of the plurality of shallow trench isolation structures, and into a substrate;
- a liner comprising an insulator material on sidewalls of the trench;
- and
- a core comprising a high thermal conductivity material on the liner;
- the transistor structure comprises a heterojunction bipolar transistor (HBT) comprising a collector, a base, and an emitter;
- and
- an uppermost surface of the core is above an interface region between the collector and the base.
9 more elements
A method of forming a semiconductor structure, comprising:
- forming a transistor structure;
- forming a plurality of shallow trench isolation structures adjacent to the transistor structure on multiple sides of the transistor structure;
- and
- forming a plurality of trench isolation structures formed through the plurality of shallow trench isolation structures,
- wherein each one of the plurality of trench isolation structures comprises:
- a trench formed through an insulator layer, one of the plurality of shallow trench isolation structures, and into a substrate;
- a liner comprising an insulator material on sidewalls of the trench;
- and
- a core comprising a high thermal conductivity material on the liner;
- the transistor structure comprises a heterojunction bipolar transistor (HBT) comprising a collector, a base, and an emitter;
- and
- an uppermost surface of the core is above an interface region between the collector and the base.
9 more elements
Dependencies are inferred from the claim text.