Strained channel transistor and method of fabrication thereof

A strained channel transistor structure, comprising:

• a substrate;
• a source stressor region on the substrate;
• and
• a drain stressor region on the substrate;
• and
• wherein:
• each stressor region comprises a lower stressor region and an upper stressor region, said upper stressor region comprising a stressor extension region;
• and
• a width of at least one of said source and drain upper stressor regions is greater than a width of the lower source stressor region;
• and
• further comprising:
• a gate stack above the stressor regions;
• a spacer element in direct contact with the gate stack, a bottom surface of the spacer element covered by and in direct contact with the substrate, the source extension stressor region and the drain extension stressor region isolated from direct contact with the bottom surface of the spacer element by the substrate;
• and
• a final spacer on the spacer element and in direct contact with a raised source structure of the source stressor region and a raised drain structure of the drain stressor region, wherein the raised source structure and the raised drain structure protrude above the substrate.

A method of forming a strained channel transistor structure on a substrate comprising a first semiconductor material, comprising the steps of:

• providing a substrate;
• etching on the substrate a lower source stressor recess and a lower drain stressor recess and filling said lower stressor recesses with a second semiconductor material;
• subsequently etching on the substrate an upper source stressor recess and an upper drain stressor recess and filling said upper stressor recesses with said second semiconductor material;
• forming a source extension stressor region;
• forming a drain extension stressor region;
• forming a channel region between said source extension stressor region and said drain extension stressor region, said channel region having a width defined by adjacent ends of said extension stressor regions;
• forming a gate stack above the channel region;
• forming a spacer element in direct contact with the gate stack, a bottom surface of the spacer element covered by and in direct contact with the substrate, the source extension stressor region and the drain extension stressor region isolated from direct contact with the bottom surface of the spacer element by the substrate;
• and
• forming a final spacer on the spacer element and in direct contact with a raised source structure of the source stressor region and a raised drain structure of the drain stressor region, wherein the raised source structure and the raised drain structure protrude above the substrate.