Conductive path in switching material in a resistive random access memory device and control

A method of forming a non-volatile memory device, comprising:

• providing a semiconductor substrate having a surface region,
• forming a first dielectric material overlying the surface region of the semiconductor substrate;
• forming a first electrode structure overlying the dielectric material;
• forming a buffer material comprising a p+polycrystalline silicon-containing material interposed between the first electrode and the amorphous silicon material to control an interfacial defect level between the first electrode and the amorphous silicon material;
• forming a resistive switching material comprising an amorphous silicon material overlying the first electrode and the p+ polycrystalline silicon-containing material;
• forming a second electrode comprising a metal material overlying the resistive switching material;
• and
• forming a thickness of second dielectric material disposed between the second electrode and the resistive switching layer, the thickness of second dielectric material being configured to electrically breakdown in a localized region by applying a first voltage to the second electrode to form an open region in a portion of the thickness of second dielectric material, the opening region having a first dimension to cause a first metal region to form in the portion of the thickness of the second dielectric material and in a portion of the resistive switching material from the metal material upon applying of the first voltage.

A device including non-volatile memory device comprising:

• a seminconductor substrate including a plurality of transistors;
• a first electrode disposed upon the semiconductor substrate;
• a buffer material layer disposed upon the first electrode, wherein the buffer material layer comprises a doped polycrystalline silicon bearing material, wherein the buffer material layer controls an interfacial defect level between the first electrode and the resistive switching material layer;
• a resistive switching material layer disposed upon the buffer material layer, wherein the resistive switching material layer comprises an amorphous silicon material;
• a second electrode disposed above the resistive switching material layer comprising a metal material;
• and
• a dielectric material layer disposed between the second electrode and upon the resistive switching layer, wherein the dielectric material layer being sufficiently thin to electrically breakdown in a region when a first voltage is applied to the second electrode and to cause formation of an electric breakdown open region in a portion of the dielectric material layer, the electric breakdown open region having a first dimension to allow a first metal region to form within the portion of the dielectric material layer and to extend in a portion of the resistive switching material layer from the metal material, wherein the dielectric material layer has a non-zero thickness of less than approximately 5 nm;
• and.