Die seal layout for VFTL dual damascene in a semiconductor device
AssigneeSpansion LLC
InventorFei Wang
Life of this patent
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Abstract
A semiconductor may include several vias located in an active region and a die seal region. In the active region, a photoresist can be patterned with openings corresponding to the vias. In the die seal area, however, the photoresist can be patterned to overlap the vias. With this configuration, an underlayer etch will not affect an underlayer resist in the die seal area, allowing the die seal area to be disregarded for purposes of calculating a process window.
Claims13
A method of forming a semiconductor device having a via disposed in an active area and a first trench disposed in a die seal area, the method comprising:
- filling the via and the first trench with an underlayer resist;
- performing an underlayer etch of the underlayer resist in the via and the first trench to remove a portion of the underlayer resist from the via and the first trench;
- resist patterning a metal material in the active area to define a second trench overlapping with the via, and in the die seal area to cover the first trench;
- performing a tetraethylorthosilicate (TEOS) etch of the active area and the die seal area;
- and
- performing an ash and SiN etch of the active area and the die seal area,
- wherein the metal material in the first trench protects the first trench during the TEOS etch.
A method of forming a semiconductor device having a via disposed in an active area and a first trench disposed in a die seal area, the method comprising:
- depositing an underlayer resist on the semiconductor device so as to fill the via and the first trench;
- etching a portion of the underlayer resist from the via and the first trench;
- patterning a second resist in the via and the first trench;
- removing a portion of the second resist from the via so as to define trench lines of the first via;
- and
- etching the active area and the die seal area to form a second trench in the active area,
- wherein the second resist protects the first trench in the die seal area from being etched during the etching.
Dependencies are inferred from the claim text.