Method for manufacturing MOS transistors with different types of gate stacks

A method for manufacturing three MOS transistors in three regions of a substrate, the three regions comprising a first region, a second region and a third region, the method comprising acts of:

• forming a first insulating layer in the first region, the second region and the third region,
• removing the first insulating layer from the first and second regions,
• forming a silicon oxide layer in the first region, the second region and the third region,
• depositing a second insulating layer in the first region, the second region and the third region, wherein the second insulating layer has a dielectric constant which is at least twice greater than that of silicon oxide,
• depositing a first conductive oxygen scavenging layer in the first region, the second region and the third region,
• completely removing the first conductive oxygen scavenging layer from the second and third regions, and
• annealing.