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US 8,898,617 B2Granted
Robust design using manufacturability models
AssigneeCadence Design Systems, Inc.
InventorsDavid White, Louis K. Scheffer
Life of this patent
Estimating the term…
Abstract
The present invention allows for a robust design using manufacturability models. A method, system and/or computer usable medium may be provided in an integrated circuit design to track sensitivity to a variation of process from wafer to wafer and/or fab to fab in order to assist the designers to anticipate the variations to improve the final yield of the products.
Claims18
A method comprising:
- performing a process with at least one computing system including at least one processor, the process comprising:
- characterizing variation in integrated circuit feature dimensions resulting from interactions between the integrated circuit feature dimensions and one or more fabrication processes;
- characterizing designed patterns or features on a section of one or more integrated circuit designs using one or more context environments in the one or more integrated circuit designs for the designed patterns of features;
- examining one or more levels of the one or more designs;
- determining variability of at least one of the one or more fabrication processes by using at least a relation between at least one integrated circuit feature and one or more modified versions of the at least one integrated circuit feature;
- evaluating the one or more designs using at least relative sensitivity of shapes to the variability of at least one of the one or more fabrication processes as shapes are defined, added, moved, and/or modified, wherein the relative sensitivity of the shapes to the variability is determined or identified based at least in part upon a result of characterizing the variation;
- and
- determining a design option from multiple design options by using at least the relative sensitivity.
5 more elements
An apparatus comprising:
- a computing system including at least one processor that is at least to:
- characterize variation in integrated circuit feature dimensions resulting from interactions between the integrated circuit feature dimensions and one or more fabrication processes;
- characterize designed patterns or features on a section of one or more integrated circuit designs using one or more context environments in the one or more integrated circuit designs for the designed patterns of features;
- examine one or more levels of the one or more designs;
- determine variability of at least one of the one or more fabrication processes by using at least a relation between at least one integrated circuit feature and one or more modified versions of the at least one integrated circuit feature;
- evaluate the one or more designs using at least relative sensitivity of shapes to the variability of at least one of the one or more fabrication processes as shapes are defined, added, moved and/or modified, wherein the relative sensitivity of the shapes to the variability is determined or identified based at least in part upon a result of characterizing the variation;
- and
- determining a design option from multiple design options by using at least the relative sensitivity.
5 more elements
A computer program product comprising a non-transitory computer usable storage medium having a set of stored instructions which, when executed by a processor, causes the processor to execute a process, the process comprising:
- characterizing variation in integrated circuit feature dimensions resulting from interactions between the integrated circuit feature dimensions and one or more fabrication processes;
- characterizing designed patterns or features on a section of one or more integrated circuit designs using one or more context environments in the one or more integrated circuit designs for the designed patterns of features;
- examining one or more levels of the one or more designs;
- determining variability of at least one of the one or more fabrication processes by using at least a relation between at least one integrated circuit feature and one or more modified versions of the at least one integrated circuit feature;
- evaluating the one or more designs using at least relative sensitivity of shapes to the variability of at least one of the one or more fabrication processes as shapes are defined, added, moved and/or modified, wherein the relative sensitivity of the shapes to the variability is determined or identified based at least in part upon a result of characterizing the variation;
- and
- determining a design option from multiple design options by using at least the relative sensitivity.
4 more elements
Dependencies are inferred from the claim text.