Apparatus for design assist and method for selecting signal line onto which test point for test controlling is to be inserted in circuit to be designed

A design assist apparatus comprising a processor that selects, as an insertion candidate, a signal line onto which a test point for test controlling is to be inserted and which is included in a circuit to be designed, wherein the processor:

• selects first insertion candidates being a plurality of signal lines in a circuit net the vertex of which is a maximum observation point having a maximum diagnosis difficulty index among a plurality of diagnosis difficulty indexes of all the observation points that are used for observing signal lines in the circuit, each of the plurality of diagnosis difficulty indexes of the observation points representing the difficulty in fault diagnosis at the corresponding observation point;
• and
• selects a second insertion candidate onto which the test point is to be inserted from the first insertion candidates, considering effects of inserting the test point onto the respective first insertion candidates,
• wherein the processor further:
• calculates prospective dispersion of the plurality of diagnosis difficulty indexes of all the observation points, considering an effect of inserting the test point onto each of the first insertion candidates;
• and
• selects, as the second insertion candidate, an insertion candidate that causes the calculated prospective dispersion when the test point is inserted onto the insertion candidate to be the smallest, from the first insertion candidates.

A design assist apparatus comprising a processor that selects, as an insertion candidate, a signal line onto which a test point for test controlling is to be inserted and which is included in a circuit to be designed, wherein the processor:

• selects first insertion candidates being a plurality of signal lines in a circuit net the vertex of which is a maximum observation point having a maximum diagnosis difficulty index among a plurality of diagnosis difficulty indexes of all the observation points that are used for observing signal lines in the circuit, each of the plurality of diagnosis difficulty indexes of the observation points representing the difficulty in fault diagnosis at the corresponding observation point;
• and
• selects a second insertion candidate onto which the test point is to be inserted from the first insertion candidates, considering effects of inserting the test point onto the respective first insertion candidates,
• wherein the processor further:
• calculates the plurality of diagnosis difficulty indexes of all the observation points;
• selects a maximum diagnosis difficulty index from the plurality of diagnosis difficulty indexes calculated;
• and
• selects, as the first insertion candidates, one or more signal lines included in the circuit net the vertex of which is the maximum observation point having the selected maximum diagnosis difficulty index.

A design assist apparatus comprising a processor that selects, as an insertion candidate, a signal line onto which a test point for test controlling is to be inserted and which is included in a circuit to be designed, wherein the processor:

• selects first insertion candidates being a plurality of signal lines in a circuit net the vertex of which is a maximum observation point having a maximum diagnosis difficulty index among a plurality of diagnosis difficulty indexes of all the observation points that are used for observing signal lines in the circuit, each of the plurality of diagnosis difficulty indexes of the observation points representing the difficulty in fault diagnosis at the corresponding observation point;
• and
• selects a second insertion candidate onto which the test point is to be inserted from the first insertion candidates, considering effects of inserting the test point onto the respective first insertion candidates,
• wherein the processor further:
• calculates, when the test point is provisionally inserted into each of the first insertion candidates, the plurality of diagnosis difficulty indexes of all the observation points, considering effect of provisionally inserting the test point onto the first insertion candidate;
• calculates dispersion of the plurality of diagnosis difficulty indexes calculated;
• and
• selects, as the second candidate, an insertion candidate that causes the calculated dispersion to be the smallest, from the first insertion candidates.

A computer-implemented method for design assist that selects, as an insertion candidate, a signal line onto which a test point for test controlling is to be inserted and which is included in a circuit to be designed, the method comprising:

• selecting, using a computer, first insertion candidates being a plurality of signal lines in a circuit net the vertex of which is a maximum observation point having a maximum diagnosis difficulty index among a plurality of diagnosis difficulty indexes of all the observation points that are used for observing signal lines in the circuit, each of the plurality of diagnosis difficulty indexes of the observation points representing the difficulty in fault diagnosis at the corresponding observation point;
• and
• selecting a second insertion candidate onto which the test point is to be inserted from the first insertion candidates, considering effects of inserting the test point onto the respective first insertion candidates
• wherein the selecting of the second insertion candidate comprising:
• calculating prospective dispersion of the plurality of diagnosis difficulty indexes of all the observation points, considering an effect of inserting the test point onto each of the first insertion candidates;
• and
• selecting, as the second insertion candidate, one or more insertion candidates each of which causes the calculated prospective dispersion when the test point is inserted onto the insertion candidate to be smaller than dispersion of the plurality of diagnosis difficulty indexes of all the observation points before the test point is inserted, from the first insertion candidates.

A non-transitory computer-readable recording medium having stored therein a design assist program for causing a computer that selects, as an insertion candidate, a signal line onto which a test point for test controlling is to be inserted and which is included in a circuit to be designed, to carry out a process comprising:

• selecting first insertion candidates being a plurality of signal lines in a circuit net the vertex of which is a maximum observation point having a maximum diagnosis difficulty index among a plurality of diagnosis difficulty indexes of all the observation points that are used for observing signal lines in the circuit, each of the plurality of diagnosis difficulty indexes of the observation points representing the difficulty in fault diagnosis at the corresponding observation point;
• and
• selecting a second insertion candidate onto which the test point is to be inserted from the first insertion candidates, considering effects of inserting the test point onto the respective first insertion candidates,
• wherein the selecting of the second insertion candidate comprising:
• calculating prospective dispersion of the plurality of diagnosis difficulty indexes of all the observation points, considering an effect of inserting the test point onto each of the first insertion candidates;
• and
• selecting, as the second insertion candidate, one or more insertion candidates each of which causes the calculated prospective dispersion when the test point is inserted onto the insertion candidate to be smaller than dispersion of the plurality of diagnosis difficulty indexes of all the observation points before the test point is inserted, from the first insertion candidates.